From e0fe723c24562c8f909bb40f131bfdbe75650677 Mon Sep 17 00:00:00 2001 From: Sergey Sorokin Date: Tue, 6 Sep 2016 19:52:17 +0100 Subject: [PATCH] target-arm: Fix lpae bit in FSR on an alignment fault If an alignment fault occurred and target EL is using AArch32, then DFSR/IFSR bit LPAE[9] must be set correctly. Signed-off-by: Sergey Sorokin Message-id: 1471283293-169850-1-git-send-email-afarallax@yandex.ru Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target-arm/op_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index 3e8588ee6a..be27b21d52 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -194,7 +194,7 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, * the LPAE long descriptor format, or the short descriptor format */ if (arm_s1_regime_using_lpae_format(env, cpu_mmu_index(env, false))) { - env->exception.fsr = 0x21; + env->exception.fsr = (1 << 9) | 0x21; } else { env->exception.fsr = 0x1; }