block/nand: QOM casting sweep
Define and use standard QOM cast macro. Remove usages of DO_UPCAST and direct -> style casting. Cc: afaerber@suse.de Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -82,6 +82,11 @@ struct NANDFlashState {
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uint32_t ioaddr_vmstate;
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};
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#define TYPE_NAND "nand"
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#define NAND(obj) \
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OBJECT_CHECK(NANDFlashState, (obj), TYPE_NAND)
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static void mem_and(uint8_t *dest, const uint8_t *src, size_t n)
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{
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/* Like memcpy() but we logical-AND the data into the destination */
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@ -224,7 +229,7 @@ static const struct {
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static void nand_reset(DeviceState *dev)
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{
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NANDFlashState *s = FROM_SYSBUS(NANDFlashState, SYS_BUS_DEVICE(dev));
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NANDFlashState *s = NAND(dev);
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s->cmd = NAND_CMD_READ0;
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s->addr = 0;
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s->addrlen = 0;
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@ -279,7 +284,7 @@ static void nand_command(NANDFlashState *s)
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break;
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case NAND_CMD_RESET:
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nand_reset(&s->busdev.qdev);
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nand_reset(DEVICE(s));
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break;
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case NAND_CMD_PAGEPROGRAM1:
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@ -319,14 +324,14 @@ static void nand_command(NANDFlashState *s)
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static void nand_pre_save(void *opaque)
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{
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NANDFlashState *s = opaque;
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NANDFlashState *s = NAND(opaque);
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s->ioaddr_vmstate = s->ioaddr - s->io;
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}
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static int nand_post_load(void *opaque, int version_id)
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{
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NANDFlashState *s = opaque;
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NANDFlashState *s = NAND(opaque);
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if (s->ioaddr_vmstate > sizeof(s->io)) {
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return -EINVAL;
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@ -365,7 +370,7 @@ static const VMStateDescription vmstate_nand = {
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static int nand_device_init(SysBusDevice *dev)
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{
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int pagesize;
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NANDFlashState *s = FROM_SYSBUS(NANDFlashState, dev);
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NANDFlashState *s = NAND(dev);
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s->buswidth = nand_flash_ids[s->chip_id].width >> 3;
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s->size = nand_flash_ids[s->chip_id].size << 20;
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@ -436,7 +441,7 @@ static void nand_class_init(ObjectClass *klass, void *data)
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}
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static const TypeInfo nand_info = {
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.name = "nand",
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.name = TYPE_NAND,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(NANDFlashState),
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.class_init = nand_class_init,
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@ -456,7 +461,8 @@ static void nand_register_types(void)
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void nand_setpins(DeviceState *dev, uint8_t cle, uint8_t ale,
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uint8_t ce, uint8_t wp, uint8_t gnd)
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{
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NANDFlashState *s = (NANDFlashState *) dev;
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NANDFlashState *s = NAND(dev);
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s->cle = cle;
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s->ale = ale;
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s->ce = ce;
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@ -477,7 +483,8 @@ void nand_getpins(DeviceState *dev, int *rb)
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void nand_setio(DeviceState *dev, uint32_t value)
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{
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int i;
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NANDFlashState *s = (NANDFlashState *) dev;
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NANDFlashState *s = NAND(dev);
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if (!s->ce && s->cle) {
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if (nand_flash_ids[s->chip_id].options & NAND_SAMSUNG_LP) {
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if (s->cmd == NAND_CMD_READ0 && value == NAND_CMD_LPREAD2)
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@ -581,7 +588,7 @@ uint32_t nand_getio(DeviceState *dev)
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{
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int offset;
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uint32_t x = 0;
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NANDFlashState *s = (NANDFlashState *) dev;
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NANDFlashState *s = NAND(dev);
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/* Allow sequential reading */
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if (!s->iolen && s->cmd == NAND_CMD_READ0) {
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