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target-ppc: Add xviexpdp instruction

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xviexpdp: VSX Vector Insert Exponent Dual Precision

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Nikunj A Dadhania 2017-01-10 14:20:38 +05:30 committed by David Gibson
parent d9031405a7
commit e385e4b7db
2 changed files with 27 additions and 0 deletions
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26
target/ppc/translate/vsx-impl.inc.c
View file

@ -1370,6 +1370,32 @@ static void gen_xviexpsp(DisasContext *ctx)
tcg_temp_free_i64(t0);
}
static void gen_xviexpdp(DisasContext *ctx)
{
TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode));
TCGv_i64 xtl = cpu_vsrl(xT(ctx->opcode));
TCGv_i64 xah = cpu_vsrh(xA(ctx->opcode));
TCGv_i64 xal = cpu_vsrl(xA(ctx->opcode));
TCGv_i64 xbh = cpu_vsrh(xB(ctx->opcode));
TCGv_i64 xbl = cpu_vsrl(xB(ctx->opcode));
TCGv_i64 t0;
if (unlikely(!ctx->vsx_enabled)) {
gen_exception(ctx, POWERPC_EXCP_VSXU);
return;
}
t0 = tcg_temp_new_i64();
tcg_gen_andi_i64(xth, xah, 0x800FFFFFFFFFFFFF);
tcg_gen_andi_i64(t0, xbh, 0x7FF);
tcg_gen_shli_i64(t0, t0, 52);
tcg_gen_or_i64(xth, xth, t0);
tcg_gen_andi_i64(xtl, xal, 0x800FFFFFFFFFFFFF);
tcg_gen_andi_i64(t0, xbl, 0x7FF);
tcg_gen_shli_i64(t0, t0, 52);
tcg_gen_or_i64(xtl, xtl, t0);
tcg_temp_free_i64(t0);
}
#undef GEN_XX2FORM
#undef GEN_XX3FORM
#undef GEN_XX2IFORM

1
target/ppc/translate/vsx-ops.inc.c
View file

@ -125,6 +125,7 @@ GEN_VSX_XFORM_300(xsiexpqp, 0x4, 0x1B, 0x00000001),
#endif
GEN_XX3FORM(xviexpsp, 0x00, 0x1B, PPC2_ISA300),
GEN_XX3FORM(xviexpdp, 0x00, 0x1F, PPC2_ISA300),
GEN_XX2FORM(xvabsdp, 0x12, 0x1D, PPC2_VSX),
GEN_XX2FORM(xvnabsdp, 0x12, 0x1E, PPC2_VSX),