target/mips: Clean up handling of CP0 register 13
Clean up handling of CP0 register 13. Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1567009614-12438-15-git-send-email-aleksandar.markovic@rt-rk.com>
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@ -357,6 +357,8 @@ typedef struct mips_def_t mips_def_t;
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#define CP0_REG12__GTOFFSET 7
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/* CP0 Register 13 */
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#define CP0_REG13__CAUSE 0
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#define CP0_REG13__VIEW_RIPL 4
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#define CP0_REG13__NESTEDEXC 5
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/* CP0 Register 14 */
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#define CP0_REG14__EPC 0
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/* CP0 Register 15 */
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@ -7202,7 +7202,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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break;
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case CP0_REGISTER_13:
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switch (sel) {
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case 0:
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case CP0_REG13__CAUSE:
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gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Cause));
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register_name = "Cause";
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break;
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@ -7928,7 +7928,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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break;
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case CP0_REGISTER_13:
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switch (sel) {
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case 0:
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case CP0_REG13__CAUSE:
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save_cpu_state(ctx, 1);
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gen_helper_mtc0_cause(cpu_env, arg);
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/*
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@ -8677,7 +8677,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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break;
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case CP0_REGISTER_13:
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switch (sel) {
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case 0:
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case CP0_REG13__CAUSE:
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gen_mfc0_load32(arg, offsetof(CPUMIPSState, CP0_Cause));
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register_name = "Cause";
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break;
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@ -9391,7 +9391,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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break;
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case CP0_REGISTER_13:
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switch (sel) {
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case 0:
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case CP0_REG13__CAUSE:
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save_cpu_state(ctx, 1);
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gen_helper_mtc0_cause(cpu_env, arg);
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/*
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