Trivial patches 20210118
Fix memory leaks Use qemu_log_mask(GUEST_ERROR) rather than error_report(). -----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmAFcX4SHGxhdXJlbnRA dml2aWVyLmV1AAoJEPMMOL0/L7483L8QAK5B+Er/SS8P2gDGeQExfEaORYhNq3Kq cuFITBsZ7Sr8UVy6C6H8KNu32RmHOu6FXL+P7GjiO9sZAQVz9MpdMhmxKAwyke78 RRx6bUtkuuznk9LqRh3NrNzbpu/f5bQWoRVYQ5kBhcFwLaEJAFqyckanIeNHOq4L v4JMcqABrh97hTfZKwx+jnbTrfgbkjTlmF1/jfzEJnBIEPYZ51gmq9/Nyi+SvcWG 8M0jprCWocZgSWnRpEse+/bkuXgZKGZOvTQjLd4Hs167QnGXUnb88/2gjONZ2Je2 YJFIaVP837T6Bx7XplexznlENBFpLxI6GXKvtJc+FaqSrqMOLvRvrr/mZxXK2OeM 4TMozqjm0KFJLKq5QPmigLgJyHIHXkW57A+R7ihgzvXcNe6DDm/zuI3oeEikcnSI t/msb2UNF1unwtALxiDwDBc7B8x3Gf6GmedF/3JZs2IRat6NOMb0XEi28i+hXguc 4lV3sZT4eCXsIwgDoulKKI/G39yE4Of6lTWIFFULxQZvlPBsVIUmHXbhC1WfCmk6 O5ZJd26YF9qO6Wepouv9lMzMTSq4YkdK7SfxrG1WZOHqCsVkVV2THWX7Mpybz3T4 L5SDrlsy+3ItNBaAX5f0twotKwc1Rcsw90JnfIXUzU6yMNQDGmMDPI9Yum7XIMX4 eOVf4UIHDVSH =B5ep -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.0-pull-request' into staging Trivial patches 20210118 Fix memory leaks Use qemu_log_mask(GUEST_ERROR) rather than error_report(). # gpg: Signature made Mon 18 Jan 2021 11:31:10 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-6.0-pull-request: hw/ide/ahci: Replace fprintf() by qemu_log_mask(GUEST_ERROR) misc/mos6522: Use timer_free() in the finalize function to avoid memleak pl031: Use timer_free() in the finalize function to avoid memleaks hw/virtio-pci: Replace error_report() by qemu_log_mask(GUEST_ERROR) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
e43d564fa3
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@ -465,8 +465,9 @@ static void ahci_mem_write(void *opaque, hwaddr addr,
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/* Only aligned reads are allowed on AHCI */
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/* Only aligned reads are allowed on AHCI */
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if (addr & 3) {
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if (addr & 3) {
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fprintf(stderr, "ahci: Mis-aligned write to addr 0x"
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qemu_log_mask(LOG_GUEST_ERROR,
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TARGET_FMT_plx "\n", addr);
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"ahci: Mis-aligned write to addr 0x%03" HWADDR_PRIX "\n",
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addr);
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return;
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return;
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}
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}
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@ -1111,7 +1112,8 @@ static void process_ncq_command(AHCIState *s, int port, uint8_t *cmd_fis,
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g_assert(is_ncq(ncq_fis->command));
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g_assert(is_ncq(ncq_fis->command));
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if (ncq_tfs->used) {
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if (ncq_tfs->used) {
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/* error - already in use */
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/* error - already in use */
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fprintf(stderr, "%s: tag %d already used\n", __func__, tag);
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qemu_log_mask(LOG_GUEST_ERROR, "%s: tag %d already used\n",
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__func__, tag);
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return;
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return;
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}
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}
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@ -490,6 +490,14 @@ static void mos6522_init(Object *obj)
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s->timers[1].timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, mos6522_timer2, s);
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s->timers[1].timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, mos6522_timer2, s);
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}
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}
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static void mos6522_finalize(Object *obj)
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{
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MOS6522State *s = MOS6522(obj);
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timer_free(s->timers[0].timer);
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timer_free(s->timers[1].timer);
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}
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static Property mos6522_properties[] = {
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static Property mos6522_properties[] = {
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DEFINE_PROP_UINT64("frequency", MOS6522State, frequency, 0),
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DEFINE_PROP_UINT64("frequency", MOS6522State, frequency, 0),
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DEFINE_PROP_END_OF_LIST()
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DEFINE_PROP_END_OF_LIST()
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@ -519,6 +527,7 @@ static const TypeInfo mos6522_type_info = {
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.parent = TYPE_SYS_BUS_DEVICE,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(MOS6522State),
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.instance_size = sizeof(MOS6522State),
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.instance_init = mos6522_init,
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.instance_init = mos6522_init,
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.instance_finalize = mos6522_finalize,
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.abstract = true,
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.abstract = true,
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.class_size = sizeof(MOS6522DeviceClass),
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.class_size = sizeof(MOS6522DeviceClass),
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.class_init = mos6522_class_init,
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.class_init = mos6522_class_init,
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@ -194,6 +194,13 @@ static void pl031_init(Object *obj)
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s->timer = timer_new_ns(rtc_clock, pl031_interrupt, s);
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s->timer = timer_new_ns(rtc_clock, pl031_interrupt, s);
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}
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}
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static void pl031_finalize(Object *obj)
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{
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PL031State *s = PL031(obj);
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timer_free(s->timer);
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}
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static int pl031_pre_save(void *opaque)
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static int pl031_pre_save(void *opaque)
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{
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{
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PL031State *s = opaque;
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PL031State *s = opaque;
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@ -329,6 +336,7 @@ static const TypeInfo pl031_info = {
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.parent = TYPE_SYS_BUS_DEVICE,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(PL031State),
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.instance_size = sizeof(PL031State),
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.instance_init = pl031_init,
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.instance_init = pl031_init,
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.instance_finalize = pl031_finalize,
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.class_init = pl031_class_init,
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.class_init = pl031_class_init,
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};
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};
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@ -27,6 +27,7 @@
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#include "hw/qdev-properties.h"
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#include "hw/qdev-properties.h"
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#include "qapi/error.h"
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#include "qapi/error.h"
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#include "qemu/error-report.h"
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#include "qemu/error-report.h"
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#include "qemu/log.h"
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#include "qemu/module.h"
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#include "qemu/module.h"
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#include "hw/pci/msi.h"
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#include "hw/pci/msi.h"
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#include "hw/pci/msix.h"
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#include "hw/pci/msix.h"
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@ -365,7 +366,8 @@ static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
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virtio_queue_set_vector(vdev, vdev->queue_sel, val);
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virtio_queue_set_vector(vdev, vdev->queue_sel, val);
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break;
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break;
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default:
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default:
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error_report("%s: unexpected address 0x%x value 0x%x",
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qemu_log_mask(LOG_GUEST_ERROR,
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"%s: unexpected address 0x%x value 0x%x\n",
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__func__, addr, val);
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__func__, addr, val);
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break;
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break;
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}
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}
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