haraldwolff/qemu-patch-raspberry4
1
0
Fork 0
Code Issues Pull requests Packages Projects Releases Wiki Activity

pc: acpi: move PIIX4 isa-bridge and pm devices into SSDT

Browse source 
and also move PRQx fields declaration as it can't be
split out into separate patch since fields use
PCI0.ISA.P40C operation region and OperationRegion
must be declared in the same table as a Field that
uses it. If this condition is not statisfied Windows
will BSOD ans IASL (make check) will error out as well.

For the same reason pm is moved together with isa-bridge
as the later refernces P13C OperationRegion from pm device.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Igor Mammedov 2015-12-28 18:02:37 +01:00 committed by Michael S. Tsirkin
parent 28f1f0e929
commit e4db279804
3 changed files with 81 additions and 49 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

77
hw/i386/acpi-build.c
View file

@ -109,6 +109,7 @@ typedef struct AcpiPmInfo {
} AcpiPmInfo;
typedef struct AcpiMiscInfo {
bool is_piix4;
bool has_hpet;
TPMVersion tpm_version;
const unsigned char *dsdt_code;
@ -131,10 +132,12 @@ static void acpi_get_dsdt(AcpiMiscInfo *info)
assert(!!piix != !!lpc);
if (piix) {
info->is_piix4 = true;
info->dsdt_code = AcpiDsdtAmlCode;
info->dsdt_size = sizeof AcpiDsdtAmlCode;
}
if (lpc) {
info->is_piix4 = false;
info->dsdt_code = Q35AcpiDsdtAmlCode;
info->dsdt_size = sizeof Q35AcpiDsdtAmlCode;
}
@ -1426,6 +1429,68 @@ static void build_dbg_aml(Aml *table)
aml_append(table, scope);
}
static void build_piix4_pci0_int(Aml *table)
{
Aml *field;
Aml *sb_scope = aml_scope("_SB");
field = aml_field("PCI0.ISA.P40C", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
aml_append(field, aml_named_field("PRQ0", 8));
aml_append(field, aml_named_field("PRQ1", 8));
aml_append(field, aml_named_field("PRQ2", 8));
aml_append(field, aml_named_field("PRQ3", 8));
aml_append(sb_scope, field);
aml_append(table, sb_scope);
}
static void build_piix4_pm(Aml *table)
{
Aml *dev;
Aml *scope;
scope = aml_scope("_SB.PCI0");
dev = aml_device("PX13");
aml_append(dev, aml_name_decl("_ADR", aml_int(0x00010003)));
aml_append(dev, aml_operation_region("P13C", AML_PCI_CONFIG,
0x00, 0xff));
aml_append(scope, dev);
aml_append(table, scope);
}
static void build_piix4_isa_bridge(Aml *table)
{
Aml *dev;
Aml *scope;
Aml *field;
scope = aml_scope("_SB.PCI0");
dev = aml_device("ISA");
aml_append(dev, aml_name_decl("_ADR", aml_int(0x00010000)));
/* PIIX PCI to ISA irq remapping */
aml_append(dev, aml_operation_region("P40C", AML_PCI_CONFIG,
0x60, 0x04));
/* enable bits */
field = aml_field("^PX13.P13C", AML_ANY_ACC, AML_NOLOCK, AML_PRESERVE);
/* Offset(0x5f),, 7, */
aml_append(field, aml_reserved_field(0x2f8));
aml_append(field, aml_reserved_field(7));
aml_append(field, aml_named_field("LPEN", 1));
/* Offset(0x67),, 3, */
aml_append(field, aml_reserved_field(0x38));
aml_append(field, aml_reserved_field(3));
aml_append(field, aml_named_field("CAEN", 1));
aml_append(field, aml_reserved_field(3));
aml_append(field, aml_named_field("CBEN", 1));
aml_append(dev, field);
aml_append(dev, aml_name_decl("FDEN", aml_int(1)));
aml_append(scope, dev);
aml_append(table, scope);
}
static void
build_ssdt(GArray *table_data, GArray *linker,
AcpiCpuInfo *cpu, AcpiPmInfo *pm, AcpiMiscInfo *misc,
@ -1447,8 +1512,16 @@ build_ssdt(GArray *table_data, GArray *linker,
acpi_data_push(ssdt->buf, sizeof(AcpiTableHeader));
build_dbg_aml(ssdt);
build_hpet_aml(ssdt);
build_isa_devices_aml(ssdt);
if (misc->is_piix4) {
build_hpet_aml(ssdt);
build_piix4_pm(ssdt);
build_piix4_isa_bridge(ssdt);
build_isa_devices_aml(ssdt);
build_piix4_pci0_int(ssdt);
} else {
build_hpet_aml(ssdt);
build_isa_devices_aml(ssdt);
}
build_cpu_hotplug_aml(ssdt);
build_memory_hotplug_aml(ssdt, nr_mem, pm->mem_hp_io_base,
pm->mem_hp_io_len);

52
hw/i386/acpi-dsdt.dsl
View file

@ -39,47 +39,6 @@ DefinitionBlock (
}
}
/****************************************************************
* PIIX4 PM
****************************************************************/
Scope(\_SB.PCI0) {
Device(PX13) {
Name(_ADR, 0x00010003)
OperationRegion(P13C, PCI_Config, 0x00, 0xff)
}
}
/****************************************************************
* PIIX3 ISA bridge
****************************************************************/
Scope(\_SB.PCI0) {
External(ISA, DeviceObj)
Device(ISA) {
Name(_ADR, 0x00010000)
/* PIIX PCI to ISA irq remapping */
OperationRegion(P40C, PCI_Config, 0x60, 0x04)
/* enable bits */
Field(\_SB.PCI0.PX13.P13C, AnyAcc, NoLock, Preserve) {
Offset(0x5f),
, 7,
LPEN, 1, // LPT
Offset(0x67),
, 3,
CAEN, 1, // COM1
, 3,
CBEN, 1, // COM2
}
Name(FDEN, 1)
}
}
/****************************************************************
* PCI hotplug
****************************************************************/
@ -168,12 +127,11 @@ DefinitionBlock (
}
}
Field(PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) {
PRQ0, 8,
PRQ1, 8,
PRQ2, 8,
PRQ3, 8
}
External(PRQ0, FieldUnitObj)
External(PRQ1, FieldUnitObj)
External(PRQ2, FieldUnitObj)
External(PRQ3, FieldUnitObj)
Method(IQST, 1, NotSerialized) {
// _STA method - get status

1
include/hw/acpi/aml-build.h
View file

@ -82,6 +82,7 @@ typedef enum {
typedef enum {
AML_SYSTEM_MEMORY = 0X00,
AML_SYSTEM_IO = 0X01,
AML_PCI_CONFIG = 0X02,
} AmlRegionSpace;
typedef enum {