PPC: e500: split mpc8544ds machine from generic e500 code
Currently the only mpc8544ds-ism that is factored out is toplevel compatible and model. In the future the generic e500 code is expected to become more generic. Signed-off-by: Scott Wood <scottwood@freescale.com> [agraf: conditionalize on CONFIG_FDT] Signed-off-by: Alexander Graf <agraf@suse.de>
This commit is contained in:
parent
b330598137
commit
e6eaabeb8d
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@ -27,4 +27,4 @@ obj-y += xilinx_ethlite.o
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obj-y := $(addprefix ../,$(obj-y))
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obj-y := $(addprefix ../,$(obj-y))
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obj-$(CONFIG_FDT) += e500.o
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obj-$(CONFIG_FDT) += e500.o mpc8544ds.o
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@ -16,6 +16,7 @@
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#include "config.h"
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#include "config.h"
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#include "qemu-common.h"
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#include "qemu-common.h"
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#include "e500.h"
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#include "net.h"
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#include "net.h"
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#include "hw/hw.h"
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#include "hw/hw.h"
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#include "hw/pc.h"
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#include "hw/pc.h"
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@ -106,24 +107,21 @@ static void dt_serial_create(void *fdt, unsigned long long offset,
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}
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}
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static int ppce500_load_device_tree(CPUPPCState *env,
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static int ppce500_load_device_tree(CPUPPCState *env,
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PPCE500Params *params,
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target_phys_addr_t addr,
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target_phys_addr_t addr,
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target_phys_addr_t ramsize,
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target_phys_addr_t initrd_base,
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target_phys_addr_t initrd_base,
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target_phys_addr_t initrd_size,
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target_phys_addr_t initrd_size)
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const char *kernel_cmdline)
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{
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{
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int ret = -1;
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int ret = -1;
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uint64_t mem_reg_property[] = { 0, cpu_to_be64(ramsize) };
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uint64_t mem_reg_property[] = { 0, cpu_to_be64(params->ram_size) };
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int fdt_size;
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int fdt_size;
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void *fdt;
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void *fdt;
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uint8_t hypercall[16];
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uint8_t hypercall[16];
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uint32_t clock_freq = 400000000;
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uint32_t clock_freq = 400000000;
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uint32_t tb_freq = 400000000;
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uint32_t tb_freq = 400000000;
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int i;
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int i;
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const char *compatible = "MPC8544DS\0MPC85xxDS";
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const char *toplevel_compat = NULL; /* user override */
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int compatible_len = sizeof("MPC8544DS\0MPC85xxDS");
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char compatible_sb[] = "fsl,mpc8544-immr\0simple-bus";
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char compatible_sb[] = "fsl,mpc8544-immr\0simple-bus";
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char model[] = "MPC8544DS";
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char soc[128];
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char soc[128];
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char mpic[128];
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char mpic[128];
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uint32_t mpic_ph;
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uint32_t mpic_ph;
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@ -146,14 +144,9 @@ static int ppce500_load_device_tree(CPUPPCState *env,
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machine_opts = qemu_opts_find(qemu_find_opts("machine"), 0);
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machine_opts = qemu_opts_find(qemu_find_opts("machine"), 0);
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if (machine_opts) {
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if (machine_opts) {
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const char *tmp;
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dumpdtb = qemu_opt_get(machine_opts, "dumpdtb");
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dumpdtb = qemu_opt_get(machine_opts, "dumpdtb");
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dtb_file = qemu_opt_get(machine_opts, "dtb");
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dtb_file = qemu_opt_get(machine_opts, "dtb");
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tmp = qemu_opt_get(machine_opts, "dt_compatible");
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toplevel_compat = qemu_opt_get(machine_opts, "dt_compatible");
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if (tmp) {
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compatible = tmp;
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compatible_len = strlen(compatible) + 1;
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}
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}
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}
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if (dtb_file) {
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if (dtb_file) {
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@ -176,8 +169,6 @@ static int ppce500_load_device_tree(CPUPPCState *env,
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}
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}
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/* Manipulate device tree in memory. */
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/* Manipulate device tree in memory. */
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qemu_devtree_setprop_string(fdt, "/", "model", model);
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qemu_devtree_setprop(fdt, "/", "compatible", compatible, compatible_len);
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qemu_devtree_setprop_cell(fdt, "/", "#address-cells", 2);
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qemu_devtree_setprop_cell(fdt, "/", "#address-cells", 2);
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qemu_devtree_setprop_cell(fdt, "/", "#size-cells", 2);
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qemu_devtree_setprop_cell(fdt, "/", "#size-cells", 2);
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@ -202,7 +193,7 @@ static int ppce500_load_device_tree(CPUPPCState *env,
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}
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}
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ret = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
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ret = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
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kernel_cmdline);
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params->kernel_cmdline);
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if (ret < 0)
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if (ret < 0)
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fprintf(stderr, "couldn't set /chosen/bootargs\n");
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fprintf(stderr, "couldn't set /chosen/bootargs\n");
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@ -338,6 +329,13 @@ static int ppce500_load_device_tree(CPUPPCState *env,
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qemu_devtree_setprop_cell(fdt, pci, "#address-cells", 3);
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qemu_devtree_setprop_cell(fdt, pci, "#address-cells", 3);
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qemu_devtree_setprop_string(fdt, "/aliases", "pci0", pci);
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qemu_devtree_setprop_string(fdt, "/aliases", "pci0", pci);
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params->fixup_devtree(params, fdt);
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if (toplevel_compat) {
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qemu_devtree_setprop(fdt, "/", "compatible", toplevel_compat,
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strlen(toplevel_compat) + 1);
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}
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done:
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done:
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if (dumpdtb) {
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if (dumpdtb) {
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/* Dump the dtb to a file and quit */
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/* Dump the dtb to a file and quit */
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@ -418,12 +416,7 @@ static void ppce500_cpu_reset(void *opaque)
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mmubooke_create_initial_mapping(env);
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mmubooke_create_initial_mapping(env);
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}
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}
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static void ppce500_init(ram_addr_t ram_size,
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void ppce500_init(PPCE500Params *params)
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const char *boot_device,
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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const char *cpu_model)
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{
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{
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MemoryRegion *address_space_mem = get_system_memory();
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MemoryRegion *address_space_mem = get_system_memory();
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MemoryRegion *ram = g_new(MemoryRegion, 1);
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MemoryRegion *ram = g_new(MemoryRegion, 1);
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@ -444,8 +437,8 @@ static void ppce500_init(ram_addr_t ram_size,
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CPUPPCState *firstenv = NULL;
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CPUPPCState *firstenv = NULL;
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/* Setup CPUs */
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/* Setup CPUs */
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if (cpu_model == NULL) {
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if (params->cpu_model == NULL) {
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cpu_model = "e500v2_v30";
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params->cpu_model = "e500v2_v30";
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}
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}
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irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
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irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
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@ -454,7 +447,7 @@ static void ppce500_init(ram_addr_t ram_size,
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PowerPCCPU *cpu;
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PowerPCCPU *cpu;
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qemu_irq *input;
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qemu_irq *input;
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cpu = cpu_ppc_init(cpu_model);
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cpu = cpu_ppc_init(params->cpu_model);
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if (cpu == NULL) {
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if (cpu == NULL) {
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fprintf(stderr, "Unable to initialize CPU!\n");
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fprintf(stderr, "Unable to initialize CPU!\n");
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exit(1);
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exit(1);
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@ -543,43 +536,45 @@ static void ppce500_init(ram_addr_t ram_size,
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sysbus_create_simple("e500-spin", MPC8544_SPIN_BASE, NULL);
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sysbus_create_simple("e500-spin", MPC8544_SPIN_BASE, NULL);
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/* Load kernel. */
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/* Load kernel. */
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if (kernel_filename) {
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if (params->kernel_filename) {
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kernel_size = load_uimage(kernel_filename, &entry, &loadaddr, NULL);
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kernel_size = load_uimage(params->kernel_filename, &entry,
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&loadaddr, NULL);
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if (kernel_size < 0) {
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if (kernel_size < 0) {
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kernel_size = load_elf(kernel_filename, NULL, NULL, &elf_entry,
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kernel_size = load_elf(params->kernel_filename, NULL, NULL,
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&elf_lowaddr, NULL, 1, ELF_MACHINE, 0);
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&elf_entry, &elf_lowaddr, NULL, 1,
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ELF_MACHINE, 0);
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entry = elf_entry;
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entry = elf_entry;
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loadaddr = elf_lowaddr;
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loadaddr = elf_lowaddr;
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}
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}
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/* XXX try again as binary */
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/* XXX try again as binary */
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if (kernel_size < 0) {
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if (kernel_size < 0) {
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fprintf(stderr, "qemu: could not load kernel '%s'\n",
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fprintf(stderr, "qemu: could not load kernel '%s'\n",
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kernel_filename);
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params->kernel_filename);
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exit(1);
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exit(1);
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}
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}
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}
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}
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/* Load initrd. */
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/* Load initrd. */
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if (initrd_filename) {
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if (params->initrd_filename) {
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initrd_base = (kernel_size + INITRD_LOAD_PAD) & ~INITRD_PAD_MASK;
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initrd_base = (kernel_size + INITRD_LOAD_PAD) & ~INITRD_PAD_MASK;
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initrd_size = load_image_targphys(initrd_filename, initrd_base,
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initrd_size = load_image_targphys(params->initrd_filename, initrd_base,
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ram_size - initrd_base);
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ram_size - initrd_base);
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if (initrd_size < 0) {
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if (initrd_size < 0) {
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fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
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fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
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initrd_filename);
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params->initrd_filename);
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exit(1);
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exit(1);
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}
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}
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}
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}
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/* If we're loading a kernel directly, we must load the device tree too. */
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/* If we're loading a kernel directly, we must load the device tree too. */
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if (kernel_filename) {
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if (params->kernel_filename) {
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struct boot_info *boot_info;
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struct boot_info *boot_info;
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int dt_size;
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int dt_size;
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dt_base = (loadaddr + kernel_size + DTC_LOAD_PAD) & ~DTC_PAD_MASK;
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dt_base = (loadaddr + kernel_size + DTC_LOAD_PAD) & ~DTC_PAD_MASK;
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dt_size = ppce500_load_device_tree(env, dt_base, ram_size, initrd_base,
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dt_size = ppce500_load_device_tree(env, params, dt_base, initrd_base,
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initrd_size, kernel_cmdline);
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initrd_size);
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if (dt_size < 0) {
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if (dt_size < 0) {
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fprintf(stderr, "couldn't load device tree\n");
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fprintf(stderr, "couldn't load device tree\n");
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exit(1);
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exit(1);
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@ -595,17 +590,3 @@ static void ppce500_init(ram_addr_t ram_size,
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kvmppc_init();
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kvmppc_init();
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}
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}
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}
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}
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static QEMUMachine ppce500_machine = {
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.name = "mpc8544ds",
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.desc = "mpc8544ds",
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.init = ppce500_init,
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.max_cpus = 15,
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};
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static void ppce500_machine_init(void)
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{
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qemu_register_machine(&ppce500_machine);
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}
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machine_init(ppce500_machine_init);
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21
hw/ppc/e500.h
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21
hw/ppc/e500.h
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@ -0,0 +1,21 @@
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#ifndef PPCE500_H
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#define PPCE500_H
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typedef struct PPCE500Params {
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/* Standard QEMU machine init params */
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ram_addr_t ram_size;
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const char *boot_device;
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const char *kernel_filename;
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const char *kernel_cmdline;
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const char *initrd_filename;
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const char *cpu_model;
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/* e500-specific params */
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/* required -- must at least add toplevel board compatible */
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void (*fixup_devtree)(struct PPCE500Params *params, void *fdt);
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} PPCE500Params;
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void ppce500_init(PPCE500Params *params);
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#endif
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61
hw/ppc/mpc8544ds.c
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61
hw/ppc/mpc8544ds.c
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@ -0,0 +1,61 @@
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/*
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* Support for the PPC e500-based mpc8544ds board
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*
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* Copyright 2012 Freescale Semiconductor, Inc.
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*
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* This is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include "config.h"
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#include "qemu-common.h"
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#include "e500.h"
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#include "../boards.h"
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#include "device_tree.h"
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static void mpc8544ds_fixup_devtree(PPCE500Params *params, void *fdt)
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{
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const char model[] = "MPC8544DS";
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const char compatible[] = "MPC8544DS\0MPC85xxDS";
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qemu_devtree_setprop(fdt, "/", "model", model, sizeof(model));
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qemu_devtree_setprop(fdt, "/", "compatible", compatible,
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sizeof(compatible));
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}
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static void mpc8544ds_init(ram_addr_t ram_size,
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const char *boot_device,
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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const char *cpu_model)
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{
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PPCE500Params params = {
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.ram_size = ram_size,
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.boot_device = boot_device,
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.kernel_filename = kernel_filename,
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.kernel_cmdline = kernel_cmdline,
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.initrd_filename = initrd_filename,
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.cpu_model = cpu_model,
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.fixup_devtree = mpc8544ds_fixup_devtree,
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};
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ppce500_init(¶ms);
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}
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static QEMUMachine ppce500_machine = {
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.name = "mpc8544ds",
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.desc = "mpc8544ds",
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.init = mpc8544ds_init,
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.max_cpus = 15,
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};
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static void ppce500_machine_init(void)
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{
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qemu_register_machine(&ppce500_machine);
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}
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machine_init(ppce500_machine_init);
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