uninorth: use object link to pass OpenPIC object to uninorth
Now that the OpenPIC is wired up via the board, we can now remove our temporary PIC qdev pointer property and replace it with an object link instead. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -38,10 +38,10 @@ static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num)
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static void pci_unin_set_irq(void *opaque, int irq_num, int level)
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{
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qemu_irq *pic = opaque;
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UNINState *s = opaque;
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trace_unin_set_irq(unin_irq_line[irq_num], level);
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qemu_set_irq(pic[unin_irq_line[irq_num]], level);
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qemu_set_irq(s->irqs[irq_num], level);
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}
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static uint32_t unin_get_config_reg(uint32_t reg, uint32_t addr)
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@ -109,6 +109,15 @@ static const MemoryRegionOps unin_data_ops = {
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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static void pci_unin_init_irqs(UNINState *s)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(s->irqs); i++) {
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s->irqs[i] = qdev_get_gpio_in(DEVICE(s->pic), unin_irq_line[i]);
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}
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}
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static void pci_unin_main_realize(DeviceState *dev, Error **errp)
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{
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UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(dev);
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@ -116,12 +125,13 @@ static void pci_unin_main_realize(DeviceState *dev, Error **errp)
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h->bus = pci_register_root_bus(dev, NULL,
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pci_unin_set_irq, pci_unin_map_irq,
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s->pic_irqs,
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s,
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&s->pci_mmio,
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get_system_io(),
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PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
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pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-pci");
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pci_unin_init_irqs(s);
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/* DEC 21154 bridge */
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#if 0
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@ -150,6 +160,11 @@ static void pci_unin_main_init(Object *obj)
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"unin-pci-hole", &s->pci_mmio,
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0x80000000ULL, 0x10000000ULL);
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object_property_add_link(obj, "pic", TYPE_OPENPIC,
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(Object **) &s->pic,
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qdev_prop_allow_set_link_before_realize,
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0, NULL);
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sysbus_init_mmio(sbd, &h->conf_mem);
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sysbus_init_mmio(sbd, &h->data_mem);
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sysbus_init_mmio(sbd, &s->pci_hole);
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@ -162,12 +177,13 @@ static void pci_u3_agp_realize(DeviceState *dev, Error **errp)
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h->bus = pci_register_root_bus(dev, NULL,
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pci_unin_set_irq, pci_unin_map_irq,
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s->pic_irqs,
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s,
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&s->pci_mmio,
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get_system_io(),
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PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
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pci_create_simple(h->bus, PCI_DEVFN(11, 0), "u3-agp");
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pci_unin_init_irqs(s);
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}
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static void pci_u3_agp_init(Object *obj)
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@ -189,6 +205,11 @@ static void pci_u3_agp_init(Object *obj)
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"unin-pci-hole", &s->pci_mmio,
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0x80000000ULL, 0x70000000ULL);
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object_property_add_link(obj, "pic", TYPE_OPENPIC,
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(Object **) &s->pic,
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qdev_prop_allow_set_link_before_realize,
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0, NULL);
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sysbus_init_mmio(sbd, &h->conf_mem);
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sysbus_init_mmio(sbd, &h->data_mem);
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sysbus_init_mmio(sbd, &s->pci_hole);
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@ -201,16 +222,18 @@ static void pci_unin_agp_realize(DeviceState *dev, Error **errp)
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h->bus = pci_register_root_bus(dev, NULL,
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pci_unin_set_irq, pci_unin_map_irq,
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s->pic_irqs,
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s,
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&s->pci_mmio,
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get_system_io(),
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PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS);
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pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north-agp");
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pci_unin_init_irqs(s);
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}
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static void pci_unin_agp_init(Object *obj)
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{
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UNINState *s = UNI_NORTH_AGP_HOST_BRIDGE(obj);
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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PCIHostState *h = PCI_HOST_BRIDGE(obj);
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@ -219,6 +242,12 @@ static void pci_unin_agp_init(Object *obj)
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obj, "unin-agp-conf-idx", 0x1000);
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memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops,
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obj, "unin-agp-conf-data", 0x1000);
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object_property_add_link(obj, "pic", TYPE_OPENPIC,
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(Object **) &s->pic,
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qdev_prop_allow_set_link_before_realize,
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0, NULL);
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sysbus_init_mmio(sbd, &h->conf_mem);
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sysbus_init_mmio(sbd, &h->data_mem);
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}
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@ -230,16 +259,18 @@ static void pci_unin_internal_realize(DeviceState *dev, Error **errp)
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h->bus = pci_register_root_bus(dev, NULL,
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pci_unin_set_irq, pci_unin_map_irq,
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s->pic_irqs,
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s,
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&s->pci_mmio,
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get_system_io(),
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PCI_DEVFN(14, 0), 4, TYPE_PCI_BUS);
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pci_create_simple(h->bus, PCI_DEVFN(14, 0), "uni-north-internal-pci");
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pci_unin_init_irqs(s);
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}
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static void pci_unin_internal_init(Object *obj)
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{
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UNINState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj);
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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PCIHostState *h = PCI_HOST_BRIDGE(obj);
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@ -248,6 +279,12 @@ static void pci_unin_internal_init(Object *obj)
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obj, "unin-pci-conf-idx", 0x1000);
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memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops,
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obj, "unin-pci-conf-data", 0x1000);
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object_property_add_link(obj, "pic", TYPE_OPENPIC,
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(Object **) &s->pic,
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qdev_prop_allow_set_link_before_realize,
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0, NULL);
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sysbus_init_mmio(sbd, &h->conf_mem);
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sysbus_init_mmio(sbd, &h->data_mem);
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}
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@ -412,17 +449,11 @@ static const TypeInfo unin_internal_pci_host_info = {
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},
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};
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static Property pci_unin_main_properties[] = {
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DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void pci_unin_main_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = pci_unin_main_realize;
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dc->props = pci_unin_main_properties;
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set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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}
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@ -434,17 +465,11 @@ static const TypeInfo pci_unin_main_info = {
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.class_init = pci_unin_main_class_init,
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};
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static Property pci_u3_agp_properties[] = {
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DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void pci_u3_agp_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = pci_u3_agp_realize;
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dc->props = pci_u3_agp_properties;
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set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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}
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@ -456,17 +481,11 @@ static const TypeInfo pci_u3_agp_info = {
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.class_init = pci_u3_agp_class_init,
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};
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static Property pci_unin_agp_class_properties[] = {
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DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void pci_unin_agp_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = pci_unin_agp_realize;
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dc->props = pci_unin_agp_class_properties;
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set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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}
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@ -478,17 +497,11 @@ static const TypeInfo pci_unin_agp_info = {
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.class_init = pci_unin_agp_class_init,
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};
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static Property pci_unin_internal_class_properties[] = {
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DEFINE_PROP_PTR("pic-irqs", UNINState, pic_irqs),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void pci_unin_internal_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = pci_unin_internal_realize;
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dc->props = pci_unin_internal_class_properties;
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set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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}
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@ -347,7 +347,8 @@ static void ppc_core99_init(MachineState *machine)
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/* 970 gets a U3 bus */
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/* Uninorth AGP bus */
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dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE);
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qdev_prop_set_ptr(dev, "pic-irqs", pic);
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object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
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&error_abort);
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qdev_init_nofail(dev);
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uninorth_pci = U3_AGP_HOST_BRIDGE(dev);
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s = SYS_BUS_DEVICE(dev);
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@ -362,7 +363,8 @@ static void ppc_core99_init(MachineState *machine)
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/* Use values found on a real PowerMac */
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/* Uninorth AGP bus */
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dev = qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
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qdev_prop_set_ptr(dev, "pic-irqs", pic);
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object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
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&error_abort);
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qdev_init_nofail(dev);
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s = SYS_BUS_DEVICE(dev);
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sysbus_mmio_map(s, 0, 0xf0800000);
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@ -370,7 +372,8 @@ static void ppc_core99_init(MachineState *machine)
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/* Uninorth internal bus */
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dev = qdev_create(NULL, TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
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qdev_prop_set_ptr(dev, "pic-irqs", pic);
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object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
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&error_abort);
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qdev_init_nofail(dev);
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s = SYS_BUS_DEVICE(dev);
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sysbus_mmio_map(s, 0, 0xf4800000);
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@ -378,7 +381,8 @@ static void ppc_core99_init(MachineState *machine)
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/* Uninorth main bus */
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dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
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qdev_prop_set_ptr(dev, "pic-irqs", pic);
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object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
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&error_abort);
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qdev_init_nofail(dev);
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uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev);
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s = SYS_BUS_DEVICE(dev);
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@ -27,6 +27,8 @@
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#include "hw/hw.h"
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#include "hw/ppc/openpic.h"
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#define TYPE_UNI_NORTH_PCI_HOST_BRIDGE "uni-north-pci-pcihost"
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#define TYPE_UNI_NORTH_AGP_HOST_BRIDGE "uni-north-agp-pcihost"
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#define TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE "uni-north-internal-pci-pcihost"
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@ -44,7 +46,8 @@
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typedef struct UNINState {
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PCIHostState parent_obj;
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void *pic_irqs;
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OpenPICState *pic;
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qemu_irq irqs[4];
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MemoryRegion pci_mmio;
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MemoryRegion pci_hole;
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} UNINState;
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