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mips_malta: convert to memory API

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Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
Avi Kivity 2011-08-08 22:14:25 +03:00
parent 60581b3777
commit ea85df72b6
1 changed files with 26 additions and 27 deletions
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53
hw/mips_malta.c
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@ -57,6 +57,9 @@
#define MAX_IDE_BUS 2 #define MAX_IDE_BUS 2
typedef struct { typedef struct {
MemoryRegion iomem;
MemoryRegion iomem_lo; /* 0 - 0x900 */
MemoryRegion iomem_hi; /* 0xa00 - 0x100000 */
uint32_t leds; uint32_t leds;
uint32_t brk; uint32_t brk;
uint32_t gpout; uint32_t gpout;
@ -215,7 +218,8 @@ static void eeprom24c0x_write(int scl, int sda)
eeprom.sda = sda; eeprom.sda = sda;
} }
static uint32_t malta_fpga_readl(void *opaque, target_phys_addr_t addr) static uint64_t malta_fpga_read(void *opaque, target_phys_addr_t addr,
unsigned size)
{ {
MaltaFPGAState *s = opaque; MaltaFPGAState *s = opaque;
uint32_t val = 0; uint32_t val = 0;
@ -302,8 +306,8 @@ static uint32_t malta_fpga_readl(void *opaque, target_phys_addr_t addr)
return val; return val;
} }
static void malta_fpga_writel(void *opaque, target_phys_addr_t addr, static void malta_fpga_write(void *opaque, target_phys_addr_t addr,
uint32_t val) uint64_t val, unsigned size)
{ {
MaltaFPGAState *s = opaque; MaltaFPGAState *s = opaque;
uint32_t saddr; uint32_t saddr;
@ -328,7 +332,7 @@ static void malta_fpga_writel(void *opaque, target_phys_addr_t addr,
/* ASCIIWORD Register */ /* ASCIIWORD Register */
case 0x00410: case 0x00410:
snprintf(s->display_text, 9, "%08X", val); snprintf(s->display_text, 9, "%08X", (uint32_t)val);
malta_fpga_update_display(s); malta_fpga_update_display(s);
break; break;
@ -388,16 +392,10 @@ static void malta_fpga_writel(void *opaque, target_phys_addr_t addr,
} }
} }
static CPUReadMemoryFunc * const malta_fpga_read[] = { static const MemoryRegionOps malta_fpga_ops = {
malta_fpga_readl, .read = malta_fpga_read,
malta_fpga_readl, .write = malta_fpga_write,
malta_fpga_readl .endianness = DEVICE_NATIVE_ENDIAN,
};
static CPUWriteMemoryFunc * const malta_fpga_write[] = {
malta_fpga_writel,
malta_fpga_writel,
malta_fpga_writel
}; };
static void malta_fpga_reset(void *opaque) static void malta_fpga_reset(void *opaque)
@ -429,20 +427,22 @@ static void malta_fpga_led_init(CharDriverState *chr)
qemu_chr_fe_printf(chr, "+--------+\r\n"); qemu_chr_fe_printf(chr, "+--------+\r\n");
} }
static MaltaFPGAState *malta_fpga_init(target_phys_addr_t base, qemu_irq uart_irq, CharDriverState *uart_chr) static MaltaFPGAState *malta_fpga_init(MemoryRegion *address_space,
target_phys_addr_t base, qemu_irq uart_irq, CharDriverState *uart_chr)
{ {
MaltaFPGAState *s; MaltaFPGAState *s;
int malta;
s = (MaltaFPGAState *)g_malloc0(sizeof(MaltaFPGAState)); s = (MaltaFPGAState *)g_malloc0(sizeof(MaltaFPGAState));
malta = cpu_register_io_memory(malta_fpga_read, memory_region_init_io(&s->iomem, &malta_fpga_ops, s,
malta_fpga_write, s, "malta-fpga", 0x100000);
DEVICE_NATIVE_ENDIAN); memory_region_init_alias(&s->iomem_lo, "malta-fpga",
&s->iomem, 0, 0x900);
memory_region_init_alias(&s->iomem_hi, "malta-fpga",
&s->iomem, 0xa00, 0x10000-0xa00);
cpu_register_physical_memory(base, 0x900, malta); memory_region_add_subregion(address_space, base, &s->iomem_lo);
/* 0xa00 is less than a page, so will still get the right offsets. */ memory_region_add_subregion(address_space, base + 0xa00, &s->iomem_hi);
cpu_register_physical_memory(base + 0xa00, 0x100000 - 0xa00, malta);
s->display = qemu_chr_new("fpga", "vc:320x200", malta_fpga_led_init); s->display = qemu_chr_new("fpga", "vc:320x200", malta_fpga_led_init);
@ -771,8 +771,8 @@ void mips_malta_init (ram_addr_t ram_size,
{ {
char *filename; char *filename;
pflash_t *fl; pflash_t *fl;
ram_addr_t ram_offset;
MemoryRegion *system_memory = get_system_memory(); MemoryRegion *system_memory = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *bios, *bios_alias = g_new(MemoryRegion, 1); MemoryRegion *bios, *bios_alias = g_new(MemoryRegion, 1);
target_long bios_size; target_long bios_size;
int64_t kernel_entry; int64_t kernel_entry;
@ -828,9 +828,8 @@ void mips_malta_init (ram_addr_t ram_size,
((unsigned int)ram_size / (1 << 20))); ((unsigned int)ram_size / (1 << 20)));
exit(1); exit(1);
} }
ram_offset = qemu_ram_alloc(NULL, "mips_malta.ram", ram_size); memory_region_init_ram(ram, NULL, "mips_malta.ram", ram_size);
memory_region_add_subregion(system_memory, 0, ram);
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
#ifdef TARGET_WORDS_BIGENDIAN #ifdef TARGET_WORDS_BIGENDIAN
be = 1; be = 1;
@ -838,7 +837,7 @@ void mips_malta_init (ram_addr_t ram_size,
be = 0; be = 0;
#endif #endif
/* FPGA */ /* FPGA */
malta_fpga_init(0x1f000000LL, env->irq[2], serial_hds[2]); malta_fpga_init(system_memory, 0x1f000000LL, env->irq[2], serial_hds[2]);
/* Load firmware in flash / BIOS unless we boot directly into a kernel. */ /* Load firmware in flash / BIOS unless we boot directly into a kernel. */
if (kernel_filename) { if (kernel_filename) {