clean build: Fix remaining sh4 warnings
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6668 c046a42c-6fe2-441c-8c8c-71466251a162
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hw/shix.c
15
hw/shix.c
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@ -45,21 +45,6 @@ void pic_info(void)
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/* XXXXX */
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/* XXXXX */
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}
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}
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void vga_update_display(void)
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{
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/* XXXXX */
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}
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void vga_invalidate_display(void)
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{
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/* XXXXX */
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}
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void vga_screen_dump(const char *filename)
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{
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/* XXXXX */
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}
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static void shix_init(ram_addr_t ram_size, int vga_ram_size,
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static void shix_init(ram_addr_t ram_size, int vga_ram_size,
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const char *boot_device,
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const char *boot_device,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *kernel_filename, const char *kernel_cmdline,
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@ -165,6 +165,8 @@ static inline void cpu_set_tls(CPUSH4State *env, target_ulong newtls)
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env->gbr = newtls;
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env->gbr = newtls;
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}
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}
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void cpu_load_tlb(CPUSH4State * env);
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#include "softfloat.h"
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#include "softfloat.h"
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#define CPUState CPUSH4State
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#define CPUState CPUSH4State
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@ -53,10 +53,4 @@ static inline void env_to_regs(void)
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/* XXXXX */
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/* XXXXX */
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}
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}
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void cpu_load_tlb(CPUState * env);
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int find_itlb_entry(CPUState * env, target_ulong address,
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int use_asid, int update);
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int find_utlb_entry(CPUState * env, target_ulong address, int use_asid);
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#endif /* _EXEC_SH4_H */
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#endif /* _EXEC_SH4_H */
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@ -313,8 +313,8 @@ static void increment_urc(CPUState * env)
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Return entry, MMU_ITLB_MISS, MMU_ITLB_MULTIPLE or MMU_DTLB_MULTIPLE
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Return entry, MMU_ITLB_MISS, MMU_ITLB_MULTIPLE or MMU_DTLB_MULTIPLE
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Update the itlb from utlb if update is not 0
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Update the itlb from utlb if update is not 0
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*/
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*/
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int find_itlb_entry(CPUState * env, target_ulong address,
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static int find_itlb_entry(CPUState * env, target_ulong address,
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int use_asid, int update)
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int use_asid, int update)
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{
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{
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int e, n;
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int e, n;
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@ -344,7 +344,7 @@ int find_itlb_entry(CPUState * env, target_ulong address,
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/* Find utlb entry
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/* Find utlb entry
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Return entry, MMU_DTLB_MISS, MMU_DTLB_MULTIPLE */
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Return entry, MMU_DTLB_MISS, MMU_DTLB_MULTIPLE */
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int find_utlb_entry(CPUState * env, target_ulong address, int use_asid)
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static int find_utlb_entry(CPUState * env, target_ulong address, int use_asid)
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{
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{
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/* per utlb access */
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/* per utlb access */
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increment_urc(env);
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increment_urc(env);
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@ -418,9 +418,9 @@ static int get_mmu_address(CPUState * env, target_ulong * physical,
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return n;
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return n;
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}
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}
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int get_physical_address(CPUState * env, target_ulong * physical,
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static int get_physical_address(CPUState * env, target_ulong * physical,
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int *prot, target_ulong address,
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int *prot, target_ulong address,
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int rw, int access_type)
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int rw, int access_type)
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{
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{
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/* P1, P2 and P4 areas do not use translation */
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/* P1, P2 and P4 areas do not use translation */
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if ((address >= 0x80000000 && address < 0xc0000000) ||
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if ((address >= 0x80000000 && address < 0xc0000000) ||
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@ -525,7 +525,7 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr)
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return physical;
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return physical;
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}
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}
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void cpu_load_tlb(CPUState * env)
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void cpu_load_tlb(CPUSH4State * env)
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{
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{
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int n = cpu_mmucr_urc(env->mmucr);
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int n = cpu_mmucr_urc(env->mmucr);
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tlb_t * entry = &env->utlb[n];
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tlb_t * entry = &env->utlb[n];
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