sm501: Add emulation of chip connected via PCI
Only the display controller part is created automatically on PCI Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Aurelien Jarno <aurelien@aurel32.net> Message-id: 647d292c6f5abba8b2a614687229949b5dcb864e.1492787889.git.balaton@eik.bme.hu Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -32,6 +32,7 @@
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#include "ui/console.h"
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#include "ui/console.h"
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#include "hw/devices.h"
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#include "hw/devices.h"
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#include "hw/sysbus.h"
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#include "hw/sysbus.h"
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#include "hw/pci/pci.h"
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#include "qemu/range.h"
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#include "qemu/range.h"
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#include "ui/pixel_ops.h"
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#include "ui/pixel_ops.h"
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#include "exec/address-spaces.h"
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#include "exec/address-spaces.h"
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@ -1547,9 +1548,73 @@ static const TypeInfo sm501_sysbus_info = {
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.class_init = sm501_sysbus_class_init,
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.class_init = sm501_sysbus_class_init,
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};
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};
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#define TYPE_PCI_SM501 "sm501"
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#define PCI_SM501(obj) OBJECT_CHECK(SM501PCIState, (obj), TYPE_PCI_SM501)
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typedef struct {
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/*< private >*/
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PCIDevice parent_obj;
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/*< public >*/
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SM501State state;
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uint32_t vram_size;
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} SM501PCIState;
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static void sm501_realize_pci(PCIDevice *dev, Error **errp)
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{
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SM501PCIState *s = PCI_SM501(dev);
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sm501_init(&s->state, DEVICE(dev), s->vram_size);
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if (get_local_mem_size(&s->state) != s->vram_size) {
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error_setg(errp, "Invalid VRAM size, nearest valid size is %" PRIu32,
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get_local_mem_size(&s->state));
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return;
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}
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pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY,
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&s->state.local_mem_region);
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pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_MEMORY,
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&s->state.mmio_region);
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}
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static Property sm501_pci_properties[] = {
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DEFINE_PROP_UINT32("vram-size", SM501PCIState, vram_size, 64 * M_BYTE),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void sm501_reset_pci(DeviceState *dev)
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{
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SM501PCIState *s = PCI_SM501(dev);
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sm501_reset(&s->state);
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/* Bits 2:0 of misc_control register is 001 for PCI */
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s->state.misc_control |= 1;
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}
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static void sm501_pci_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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k->realize = sm501_realize_pci;
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k->vendor_id = PCI_VENDOR_ID_SILICON_MOTION;
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k->device_id = PCI_DEVICE_ID_SM501;
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k->class_id = PCI_CLASS_DISPLAY_OTHER;
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set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
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dc->desc = "SM501 Display Controller";
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dc->props = sm501_pci_properties;
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dc->reset = sm501_reset_pci;
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dc->hotpluggable = false;
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}
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static const TypeInfo sm501_pci_info = {
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.name = TYPE_PCI_SM501,
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.parent = TYPE_PCI_DEVICE,
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.instance_size = sizeof(SM501PCIState),
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.class_init = sm501_pci_class_init,
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};
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static void sm501_register_types(void)
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static void sm501_register_types(void)
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{
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{
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type_register_static(&sm501_sysbus_info);
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type_register_static(&sm501_sysbus_info);
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type_register_static(&sm501_pci_info);
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}
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}
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type_init(sm501_register_types)
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type_init(sm501_register_types)
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@ -207,6 +207,9 @@
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#define PCI_VENDOR_ID_MARVELL 0x11ab
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#define PCI_VENDOR_ID_MARVELL 0x11ab
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#define PCI_VENDOR_ID_SILICON_MOTION 0x126f
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#define PCI_DEVICE_ID_SM501 0x0501
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#define PCI_VENDOR_ID_ENSONIQ 0x1274
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#define PCI_VENDOR_ID_ENSONIQ 0x1274
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#define PCI_DEVICE_ID_ENSONIQ_ES1370 0x5000
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#define PCI_DEVICE_ID_ENSONIQ_ES1370 0x5000
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