hw/i386: split PCMachineState deriving X86MachineState from it
Split up PCMachineState and PCMachineClass and derive X86MachineState and X86MachineClass from them. This allows sharing code with non-PC x86 machine types. Signed-off-by: Sergio Lopez <slp@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
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549e984e67
commit
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@ -128,7 +128,7 @@ void build_legacy_cpu_hotplug_aml(Aml *ctx, MachineState *machine,
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Aml *one = aml_int(1);
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Aml *one = aml_int(1);
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(machine);
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const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(machine);
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PCMachineState *pcms = PC_MACHINE(machine);
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X86MachineState *x86ms = X86_MACHINE(machine);
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/*
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/*
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* _MAT method - creates an madt apic buffer
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* _MAT method - creates an madt apic buffer
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@ -236,9 +236,9 @@ void build_legacy_cpu_hotplug_aml(Aml *ctx, MachineState *machine,
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/* The current AML generator can cover the APIC ID range [0..255],
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/* The current AML generator can cover the APIC ID range [0..255],
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* inclusive, for VCPU hotplug. */
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* inclusive, for VCPU hotplug. */
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QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256);
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QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256);
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if (pcms->apic_id_limit > ACPI_CPU_HOTPLUG_ID_LIMIT) {
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if (x86ms->apic_id_limit > ACPI_CPU_HOTPLUG_ID_LIMIT) {
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error_report("max_cpus is too large. APIC ID of last CPU is %u",
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error_report("max_cpus is too large. APIC ID of last CPU is %u",
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pcms->apic_id_limit - 1);
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x86ms->apic_id_limit - 1);
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exit(1);
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exit(1);
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}
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}
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@ -315,8 +315,8 @@ void build_legacy_cpu_hotplug_aml(Aml *ctx, MachineState *machine,
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* ith up to 255 elements. Windows guests up to win2k8 fail when
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* ith up to 255 elements. Windows guests up to win2k8 fail when
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* VarPackageOp is used.
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* VarPackageOp is used.
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*/
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*/
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pkg = pcms->apic_id_limit <= 255 ? aml_package(pcms->apic_id_limit) :
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pkg = x86ms->apic_id_limit <= 255 ? aml_package(x86ms->apic_id_limit) :
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aml_varpackage(pcms->apic_id_limit);
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aml_varpackage(x86ms->apic_id_limit);
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for (i = 0, apic_idx = 0; i < apic_ids->len; i++) {
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for (i = 0, apic_idx = 0; i < apic_ids->len; i++) {
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int apic_id = apic_ids->cpus[i].arch_id;
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int apic_id = apic_ids->cpus[i].arch_id;
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@ -361,6 +361,7 @@ static void
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build_madt(GArray *table_data, BIOSLinker *linker, PCMachineState *pcms)
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build_madt(GArray *table_data, BIOSLinker *linker, PCMachineState *pcms)
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{
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{
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MachineClass *mc = MACHINE_GET_CLASS(pcms);
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MachineClass *mc = MACHINE_GET_CLASS(pcms);
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X86MachineState *x86ms = X86_MACHINE(pcms);
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const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(MACHINE(pcms));
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const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(MACHINE(pcms));
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int madt_start = table_data->len;
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int madt_start = table_data->len;
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AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(pcms->acpi_dev);
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AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(pcms->acpi_dev);
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@ -390,7 +391,7 @@ build_madt(GArray *table_data, BIOSLinker *linker, PCMachineState *pcms)
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io_apic->address = cpu_to_le32(IO_APIC_DEFAULT_ADDRESS);
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io_apic->address = cpu_to_le32(IO_APIC_DEFAULT_ADDRESS);
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io_apic->interrupt = cpu_to_le32(0);
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io_apic->interrupt = cpu_to_le32(0);
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if (pcms->apic_xrupt_override) {
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if (x86ms->apic_xrupt_override) {
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intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr);
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intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr);
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intsrcovr->type = ACPI_APIC_XRUPT_OVERRIDE;
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intsrcovr->type = ACPI_APIC_XRUPT_OVERRIDE;
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intsrcovr->length = sizeof(*intsrcovr);
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intsrcovr->length = sizeof(*intsrcovr);
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@ -1831,6 +1832,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
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CrsRangeSet crs_range_set;
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CrsRangeSet crs_range_set;
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PCMachineState *pcms = PC_MACHINE(machine);
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PCMachineState *pcms = PC_MACHINE(machine);
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PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(machine);
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PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(machine);
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X86MachineState *x86ms = X86_MACHINE(machine);
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AcpiMcfgInfo mcfg;
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AcpiMcfgInfo mcfg;
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uint32_t nr_mem = machine->ram_slots;
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uint32_t nr_mem = machine->ram_slots;
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int root_bus_limit = 0xFF;
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int root_bus_limit = 0xFF;
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@ -2103,7 +2105,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
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* with half of the 16-bit control register. Hence, the total size
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* with half of the 16-bit control register. Hence, the total size
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* of the i/o region used is FW_CFG_CTL_SIZE; when using DMA, the
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* of the i/o region used is FW_CFG_CTL_SIZE; when using DMA, the
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* DMA control register is located at FW_CFG_DMA_IO_BASE + 4 */
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* DMA control register is located at FW_CFG_DMA_IO_BASE + 4 */
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uint8_t io_size = object_property_get_bool(OBJECT(pcms->fw_cfg),
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uint8_t io_size = object_property_get_bool(OBJECT(x86ms->fw_cfg),
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"dma_enabled", NULL) ?
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"dma_enabled", NULL) ?
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ROUND_UP(FW_CFG_CTL_SIZE, 4) + sizeof(dma_addr_t) :
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ROUND_UP(FW_CFG_CTL_SIZE, 4) + sizeof(dma_addr_t) :
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FW_CFG_CTL_SIZE;
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FW_CFG_CTL_SIZE;
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@ -2336,6 +2338,7 @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
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int srat_start, numa_start, slots;
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int srat_start, numa_start, slots;
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uint64_t mem_len, mem_base, next_base;
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uint64_t mem_len, mem_base, next_base;
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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X86MachineState *x86ms = X86_MACHINE(machine);
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const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(machine);
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const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(machine);
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PCMachineState *pcms = PC_MACHINE(machine);
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PCMachineState *pcms = PC_MACHINE(machine);
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ram_addr_t hotplugabble_address_space_size =
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ram_addr_t hotplugabble_address_space_size =
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@ -2406,16 +2409,16 @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
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}
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}
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/* Cut out the ACPI_PCI hole */
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/* Cut out the ACPI_PCI hole */
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if (mem_base <= pcms->below_4g_mem_size &&
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if (mem_base <= x86ms->below_4g_mem_size &&
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next_base > pcms->below_4g_mem_size) {
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next_base > x86ms->below_4g_mem_size) {
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mem_len -= next_base - pcms->below_4g_mem_size;
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mem_len -= next_base - x86ms->below_4g_mem_size;
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if (mem_len > 0) {
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if (mem_len > 0) {
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numamem = acpi_data_push(table_data, sizeof *numamem);
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numamem = acpi_data_push(table_data, sizeof *numamem);
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build_srat_memory(numamem, mem_base, mem_len, i - 1,
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build_srat_memory(numamem, mem_base, mem_len, i - 1,
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MEM_AFFINITY_ENABLED);
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MEM_AFFINITY_ENABLED);
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}
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}
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mem_base = 1ULL << 32;
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mem_base = 1ULL << 32;
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mem_len = next_base - pcms->below_4g_mem_size;
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mem_len = next_base - x86ms->below_4g_mem_size;
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next_base = mem_base + mem_len;
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next_base = mem_base + mem_len;
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}
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}
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@ -2634,6 +2637,7 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine)
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{
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{
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PCMachineState *pcms = PC_MACHINE(machine);
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PCMachineState *pcms = PC_MACHINE(machine);
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PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
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PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
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X86MachineState *x86ms = X86_MACHINE(machine);
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GArray *table_offsets;
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GArray *table_offsets;
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unsigned facs, dsdt, rsdt, fadt;
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unsigned facs, dsdt, rsdt, fadt;
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AcpiPmInfo pm;
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AcpiPmInfo pm;
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@ -2795,7 +2799,7 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine)
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*/
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*/
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int legacy_aml_len =
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int legacy_aml_len =
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pcmc->legacy_acpi_table_size +
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pcmc->legacy_acpi_table_size +
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ACPI_BUILD_LEGACY_CPU_AML_SIZE * pcms->apic_id_limit;
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ACPI_BUILD_LEGACY_CPU_AML_SIZE * x86ms->apic_id_limit;
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int legacy_table_size =
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int legacy_table_size =
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ROUND_UP(tables_blob->len - aml_len + legacy_aml_len,
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ROUND_UP(tables_blob->len - aml_len + legacy_aml_len,
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ACPI_BUILD_ALIGN_SIZE);
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ACPI_BUILD_ALIGN_SIZE);
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@ -2885,13 +2889,14 @@ void acpi_setup(void)
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{
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{
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PCMachineState *pcms = PC_MACHINE(qdev_get_machine());
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PCMachineState *pcms = PC_MACHINE(qdev_get_machine());
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PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
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PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
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X86MachineState *x86ms = X86_MACHINE(pcms);
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AcpiBuildTables tables;
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AcpiBuildTables tables;
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AcpiBuildState *build_state;
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AcpiBuildState *build_state;
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Object *vmgenid_dev;
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Object *vmgenid_dev;
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TPMIf *tpm;
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TPMIf *tpm;
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static FwCfgTPMConfig tpm_config;
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static FwCfgTPMConfig tpm_config;
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if (!pcms->fw_cfg) {
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if (!x86ms->fw_cfg) {
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ACPI_BUILD_DPRINTF("No fw cfg. Bailing out.\n");
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ACPI_BUILD_DPRINTF("No fw cfg. Bailing out.\n");
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return;
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return;
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}
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}
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@ -2922,7 +2927,7 @@ void acpi_setup(void)
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acpi_add_rom_blob(acpi_build_update, build_state,
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acpi_add_rom_blob(acpi_build_update, build_state,
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tables.linker->cmd_blob, "etc/table-loader", 0);
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tables.linker->cmd_blob, "etc/table-loader", 0);
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fw_cfg_add_file(pcms->fw_cfg, ACPI_BUILD_TPMLOG_FILE,
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fw_cfg_add_file(x86ms->fw_cfg, ACPI_BUILD_TPMLOG_FILE,
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tables.tcpalog->data, acpi_data_len(tables.tcpalog));
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tables.tcpalog->data, acpi_data_len(tables.tcpalog));
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tpm = tpm_find();
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tpm = tpm_find();
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@ -2932,13 +2937,13 @@ void acpi_setup(void)
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.tpm_version = tpm_get_version(tpm),
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.tpm_version = tpm_get_version(tpm),
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.tpmppi_version = TPM_PPI_VERSION_1_30
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.tpmppi_version = TPM_PPI_VERSION_1_30
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};
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};
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fw_cfg_add_file(pcms->fw_cfg, "etc/tpm/config",
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fw_cfg_add_file(x86ms->fw_cfg, "etc/tpm/config",
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&tpm_config, sizeof tpm_config);
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&tpm_config, sizeof tpm_config);
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}
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}
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vmgenid_dev = find_vmgenid_dev();
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vmgenid_dev = find_vmgenid_dev();
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if (vmgenid_dev) {
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if (vmgenid_dev) {
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vmgenid_add_fw_cfg(VMGENID(vmgenid_dev), pcms->fw_cfg,
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vmgenid_add_fw_cfg(VMGENID(vmgenid_dev), x86ms->fw_cfg,
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tables.vmgenid);
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tables.vmgenid);
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}
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}
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@ -2951,7 +2956,7 @@ void acpi_setup(void)
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uint32_t rsdp_size = acpi_data_len(tables.rsdp);
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uint32_t rsdp_size = acpi_data_len(tables.rsdp);
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build_state->rsdp = g_memdup(tables.rsdp->data, rsdp_size);
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build_state->rsdp = g_memdup(tables.rsdp->data, rsdp_size);
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fw_cfg_add_file_callback(pcms->fw_cfg, ACPI_BUILD_RSDP_FILE,
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fw_cfg_add_file_callback(x86ms->fw_cfg, ACPI_BUILD_RSDP_FILE,
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acpi_build_update, NULL, build_state,
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acpi_build_update, NULL, build_state,
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build_state->rsdp, rsdp_size, true);
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build_state->rsdp, rsdp_size, true);
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build_state->rsdp_mr = NULL;
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build_state->rsdp_mr = NULL;
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@ -1540,6 +1540,7 @@ static void amdvi_realize(DeviceState *dev, Error **err)
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X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(dev);
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X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(dev);
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MachineState *ms = MACHINE(qdev_get_machine());
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MachineState *ms = MACHINE(qdev_get_machine());
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PCMachineState *pcms = PC_MACHINE(ms);
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PCMachineState *pcms = PC_MACHINE(ms);
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X86MachineState *x86ms = X86_MACHINE(ms);
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PCIBus *bus = pcms->bus;
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PCIBus *bus = pcms->bus;
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s->iotlb = g_hash_table_new_full(amdvi_uint64_hash,
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s->iotlb = g_hash_table_new_full(amdvi_uint64_hash,
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@ -1568,7 +1569,7 @@ static void amdvi_realize(DeviceState *dev, Error **err)
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}
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}
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/* Pseudo address space under root PCI bus. */
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/* Pseudo address space under root PCI bus. */
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pcms->ioapic_as = amdvi_host_dma_iommu(bus, s, AMDVI_IOAPIC_SB_DEVID);
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x86ms->ioapic_as = amdvi_host_dma_iommu(bus, s, AMDVI_IOAPIC_SB_DEVID);
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/* set up MMIO */
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/* set up MMIO */
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memory_region_init_io(&s->mmio, OBJECT(s), &mmio_mem_ops, s, "amdvi-mmio",
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memory_region_init_io(&s->mmio, OBJECT(s), &mmio_mem_ops, s, "amdvi-mmio",
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@ -3733,6 +3733,7 @@ static void vtd_realize(DeviceState *dev, Error **errp)
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{
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{
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MachineState *ms = MACHINE(qdev_get_machine());
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MachineState *ms = MACHINE(qdev_get_machine());
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PCMachineState *pcms = PC_MACHINE(ms);
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PCMachineState *pcms = PC_MACHINE(ms);
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X86MachineState *x86ms = X86_MACHINE(ms);
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PCIBus *bus = pcms->bus;
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PCIBus *bus = pcms->bus;
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IntelIOMMUState *s = INTEL_IOMMU_DEVICE(dev);
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IntelIOMMUState *s = INTEL_IOMMU_DEVICE(dev);
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X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(dev);
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X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(dev);
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@ -3773,7 +3774,7 @@ static void vtd_realize(DeviceState *dev, Error **errp)
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sysbus_mmio_map(SYS_BUS_DEVICE(s), 0, Q35_HOST_BRIDGE_IOMMU_ADDR);
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sysbus_mmio_map(SYS_BUS_DEVICE(s), 0, Q35_HOST_BRIDGE_IOMMU_ADDR);
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pci_setup_iommu(bus, vtd_host_dma_iommu, dev);
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pci_setup_iommu(bus, vtd_host_dma_iommu, dev);
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/* Pseudo address space under root PCI bus. */
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/* Pseudo address space under root PCI bus. */
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pcms->ioapic_as = vtd_host_dma_iommu(bus, s, Q35_PSEUDO_DEVFN_IOAPIC);
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x86ms->ioapic_as = vtd_host_dma_iommu(bus, s, Q35_PSEUDO_DEVFN_IOAPIC);
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qemu_add_machine_init_done_notifier(&vtd_machine_done_notify);
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qemu_add_machine_init_done_notifier(&vtd_machine_done_notify);
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}
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}
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178
hw/i386/pc.c
178
hw/i386/pc.c
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@ -79,7 +79,6 @@
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#include "qapi/qapi-visit-common.h"
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#include "qapi/qapi-visit-common.h"
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#include "qapi/visitor.h"
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#include "qapi/visitor.h"
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#include "hw/core/cpu.h"
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#include "hw/core/cpu.h"
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#include "hw/nmi.h"
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#include "hw/usb.h"
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#include "hw/usb.h"
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#include "hw/i386/intel_iommu.h"
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#include "hw/i386/intel_iommu.h"
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#include "hw/net/ne2000-isa.h"
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#include "hw/net/ne2000-isa.h"
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@ -680,17 +679,18 @@ void pc_cmos_init(PCMachineState *pcms,
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{
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{
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int val;
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int val;
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static pc_cmos_init_late_arg arg;
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static pc_cmos_init_late_arg arg;
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X86MachineState *x86ms = X86_MACHINE(pcms);
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/* various important CMOS locations needed by PC/Bochs bios */
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/* various important CMOS locations needed by PC/Bochs bios */
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/* memory size */
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/* memory size */
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/* base memory (first MiB) */
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/* base memory (first MiB) */
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val = MIN(pcms->below_4g_mem_size / KiB, 640);
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val = MIN(x86ms->below_4g_mem_size / KiB, 640);
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rtc_set_memory(s, 0x15, val);
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rtc_set_memory(s, 0x15, val);
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rtc_set_memory(s, 0x16, val >> 8);
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rtc_set_memory(s, 0x16, val >> 8);
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/* extended memory (next 64MiB) */
|
/* extended memory (next 64MiB) */
|
||||||
if (pcms->below_4g_mem_size > 1 * MiB) {
|
if (x86ms->below_4g_mem_size > 1 * MiB) {
|
||||||
val = (pcms->below_4g_mem_size - 1 * MiB) / KiB;
|
val = (x86ms->below_4g_mem_size - 1 * MiB) / KiB;
|
||||||
} else {
|
} else {
|
||||||
val = 0;
|
val = 0;
|
||||||
}
|
}
|
||||||
|
@ -701,8 +701,8 @@ void pc_cmos_init(PCMachineState *pcms,
|
||||||
rtc_set_memory(s, 0x30, val);
|
rtc_set_memory(s, 0x30, val);
|
||||||
rtc_set_memory(s, 0x31, val >> 8);
|
rtc_set_memory(s, 0x31, val >> 8);
|
||||||
/* memory between 16MiB and 4GiB */
|
/* memory between 16MiB and 4GiB */
|
||||||
if (pcms->below_4g_mem_size > 16 * MiB) {
|
if (x86ms->below_4g_mem_size > 16 * MiB) {
|
||||||
val = (pcms->below_4g_mem_size - 16 * MiB) / (64 * KiB);
|
val = (x86ms->below_4g_mem_size - 16 * MiB) / (64 * KiB);
|
||||||
} else {
|
} else {
|
||||||
val = 0;
|
val = 0;
|
||||||
}
|
}
|
||||||
|
@ -711,14 +711,14 @@ void pc_cmos_init(PCMachineState *pcms,
|
||||||
rtc_set_memory(s, 0x34, val);
|
rtc_set_memory(s, 0x34, val);
|
||||||
rtc_set_memory(s, 0x35, val >> 8);
|
rtc_set_memory(s, 0x35, val >> 8);
|
||||||
/* memory above 4GiB */
|
/* memory above 4GiB */
|
||||||
val = pcms->above_4g_mem_size / 65536;
|
val = x86ms->above_4g_mem_size / 65536;
|
||||||
rtc_set_memory(s, 0x5b, val);
|
rtc_set_memory(s, 0x5b, val);
|
||||||
rtc_set_memory(s, 0x5c, val >> 8);
|
rtc_set_memory(s, 0x5c, val >> 8);
|
||||||
rtc_set_memory(s, 0x5d, val >> 16);
|
rtc_set_memory(s, 0x5d, val >> 16);
|
||||||
|
|
||||||
object_property_add_link(OBJECT(pcms), "rtc_state",
|
object_property_add_link(OBJECT(pcms), "rtc_state",
|
||||||
TYPE_ISA_DEVICE,
|
TYPE_ISA_DEVICE,
|
||||||
(Object **)&pcms->rtc,
|
(Object **)&x86ms->rtc,
|
||||||
object_property_allow_set_link,
|
object_property_allow_set_link,
|
||||||
OBJ_PROP_LINK_STRONG, &error_abort);
|
OBJ_PROP_LINK_STRONG, &error_abort);
|
||||||
object_property_set_link(OBJECT(pcms), OBJECT(s),
|
object_property_set_link(OBJECT(pcms), OBJECT(s),
|
||||||
|
@ -907,7 +907,7 @@ void pc_acpi_smi_interrupt(void *opaque, int irq, int level)
|
||||||
*/
|
*/
|
||||||
void pc_smp_parse(MachineState *ms, QemuOpts *opts)
|
void pc_smp_parse(MachineState *ms, QemuOpts *opts)
|
||||||
{
|
{
|
||||||
PCMachineState *pcms = PC_MACHINE(ms);
|
X86MachineState *x86ms = X86_MACHINE(ms);
|
||||||
|
|
||||||
if (opts) {
|
if (opts) {
|
||||||
unsigned cpus = qemu_opt_get_number(opts, "cpus", 0);
|
unsigned cpus = qemu_opt_get_number(opts, "cpus", 0);
|
||||||
|
@ -971,7 +971,7 @@ void pc_smp_parse(MachineState *ms, QemuOpts *opts)
|
||||||
ms->smp.cpus = cpus;
|
ms->smp.cpus = cpus;
|
||||||
ms->smp.cores = cores;
|
ms->smp.cores = cores;
|
||||||
ms->smp.threads = threads;
|
ms->smp.threads = threads;
|
||||||
pcms->smp_dies = dies;
|
x86ms->smp_dies = dies;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (ms->smp.cpus > 1) {
|
if (ms->smp.cpus > 1) {
|
||||||
|
@ -1024,10 +1024,11 @@ void pc_machine_done(Notifier *notifier, void *data)
|
||||||
{
|
{
|
||||||
PCMachineState *pcms = container_of(notifier,
|
PCMachineState *pcms = container_of(notifier,
|
||||||
PCMachineState, machine_done);
|
PCMachineState, machine_done);
|
||||||
|
X86MachineState *x86ms = X86_MACHINE(pcms);
|
||||||
PCIBus *bus = pcms->bus;
|
PCIBus *bus = pcms->bus;
|
||||||
|
|
||||||
/* set the number of CPUs */
|
/* set the number of CPUs */
|
||||||
rtc_set_cpus_count(pcms->rtc, pcms->boot_cpus);
|
rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus);
|
||||||
|
|
||||||
if (bus) {
|
if (bus) {
|
||||||
int extra_hosts = 0;
|
int extra_hosts = 0;
|
||||||
|
@ -1038,23 +1039,23 @@ void pc_machine_done(Notifier *notifier, void *data)
|
||||||
extra_hosts++;
|
extra_hosts++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
if (extra_hosts && pcms->fw_cfg) {
|
if (extra_hosts && x86ms->fw_cfg) {
|
||||||
uint64_t *val = g_malloc(sizeof(*val));
|
uint64_t *val = g_malloc(sizeof(*val));
|
||||||
*val = cpu_to_le64(extra_hosts);
|
*val = cpu_to_le64(extra_hosts);
|
||||||
fw_cfg_add_file(pcms->fw_cfg,
|
fw_cfg_add_file(x86ms->fw_cfg,
|
||||||
"etc/extra-pci-roots", val, sizeof(*val));
|
"etc/extra-pci-roots", val, sizeof(*val));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
acpi_setup();
|
acpi_setup();
|
||||||
if (pcms->fw_cfg) {
|
if (x86ms->fw_cfg) {
|
||||||
fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg);
|
fw_cfg_build_smbios(MACHINE(pcms), x86ms->fw_cfg);
|
||||||
fw_cfg_build_feature_control(MACHINE(pcms), pcms->fw_cfg);
|
fw_cfg_build_feature_control(MACHINE(pcms), x86ms->fw_cfg);
|
||||||
/* update FW_CFG_NB_CPUS to account for -device added CPUs */
|
/* update FW_CFG_NB_CPUS to account for -device added CPUs */
|
||||||
fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
|
fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pcms->apic_id_limit > 255 && !xen_enabled()) {
|
if (x86ms->apic_id_limit > 255 && !xen_enabled()) {
|
||||||
IntelIOMMUState *iommu = INTEL_IOMMU_DEVICE(x86_iommu_get_default());
|
IntelIOMMUState *iommu = INTEL_IOMMU_DEVICE(x86_iommu_get_default());
|
||||||
|
|
||||||
if (!iommu || !x86_iommu_ir_supported(X86_IOMMU_DEVICE(iommu)) ||
|
if (!iommu || !x86_iommu_ir_supported(X86_IOMMU_DEVICE(iommu)) ||
|
||||||
|
@ -1072,8 +1073,9 @@ void pc_guest_info_init(PCMachineState *pcms)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
MachineState *ms = MACHINE(pcms);
|
MachineState *ms = MACHINE(pcms);
|
||||||
|
X86MachineState *x86ms = X86_MACHINE(pcms);
|
||||||
|
|
||||||
pcms->apic_xrupt_override = kvm_allows_irq0_override();
|
x86ms->apic_xrupt_override = kvm_allows_irq0_override();
|
||||||
pcms->numa_nodes = ms->numa_state->num_nodes;
|
pcms->numa_nodes = ms->numa_state->num_nodes;
|
||||||
pcms->node_mem = g_malloc0(pcms->numa_nodes *
|
pcms->node_mem = g_malloc0(pcms->numa_nodes *
|
||||||
sizeof *pcms->node_mem);
|
sizeof *pcms->node_mem);
|
||||||
|
@ -1098,11 +1100,12 @@ void xen_load_linux(PCMachineState *pcms)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
FWCfgState *fw_cfg;
|
FWCfgState *fw_cfg;
|
||||||
|
X86MachineState *x86ms = X86_MACHINE(pcms);
|
||||||
|
|
||||||
assert(MACHINE(pcms)->kernel_filename != NULL);
|
assert(MACHINE(pcms)->kernel_filename != NULL);
|
||||||
|
|
||||||
fw_cfg = fw_cfg_init_io(FW_CFG_IO_BASE);
|
fw_cfg = fw_cfg_init_io(FW_CFG_IO_BASE);
|
||||||
fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
|
fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus);
|
||||||
rom_set_fw(fw_cfg);
|
rom_set_fw(fw_cfg);
|
||||||
|
|
||||||
x86_load_linux(pcms, fw_cfg);
|
x86_load_linux(pcms, fw_cfg);
|
||||||
|
@ -1113,7 +1116,7 @@ void xen_load_linux(PCMachineState *pcms)
|
||||||
!strcmp(option_rom[i].name, "multiboot.bin"));
|
!strcmp(option_rom[i].name, "multiboot.bin"));
|
||||||
rom_add_option(option_rom[i].name, option_rom[i].bootindex);
|
rom_add_option(option_rom[i].name, option_rom[i].bootindex);
|
||||||
}
|
}
|
||||||
pcms->fw_cfg = fw_cfg;
|
x86ms->fw_cfg = fw_cfg;
|
||||||
}
|
}
|
||||||
|
|
||||||
void pc_memory_init(PCMachineState *pcms,
|
void pc_memory_init(PCMachineState *pcms,
|
||||||
|
@ -1128,9 +1131,10 @@ void pc_memory_init(PCMachineState *pcms,
|
||||||
MachineState *machine = MACHINE(pcms);
|
MachineState *machine = MACHINE(pcms);
|
||||||
MachineClass *mc = MACHINE_GET_CLASS(machine);
|
MachineClass *mc = MACHINE_GET_CLASS(machine);
|
||||||
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
|
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
|
||||||
|
X86MachineState *x86ms = X86_MACHINE(pcms);
|
||||||
|
|
||||||
assert(machine->ram_size == pcms->below_4g_mem_size +
|
assert(machine->ram_size == x86ms->below_4g_mem_size +
|
||||||
pcms->above_4g_mem_size);
|
x86ms->above_4g_mem_size);
|
||||||
|
|
||||||
linux_boot = (machine->kernel_filename != NULL);
|
linux_boot = (machine->kernel_filename != NULL);
|
||||||
|
|
||||||
|
@ -1144,17 +1148,17 @@ void pc_memory_init(PCMachineState *pcms,
|
||||||
*ram_memory = ram;
|
*ram_memory = ram;
|
||||||
ram_below_4g = g_malloc(sizeof(*ram_below_4g));
|
ram_below_4g = g_malloc(sizeof(*ram_below_4g));
|
||||||
memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", ram,
|
memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", ram,
|
||||||
0, pcms->below_4g_mem_size);
|
0, x86ms->below_4g_mem_size);
|
||||||
memory_region_add_subregion(system_memory, 0, ram_below_4g);
|
memory_region_add_subregion(system_memory, 0, ram_below_4g);
|
||||||
e820_add_entry(0, pcms->below_4g_mem_size, E820_RAM);
|
e820_add_entry(0, x86ms->below_4g_mem_size, E820_RAM);
|
||||||
if (pcms->above_4g_mem_size > 0) {
|
if (x86ms->above_4g_mem_size > 0) {
|
||||||
ram_above_4g = g_malloc(sizeof(*ram_above_4g));
|
ram_above_4g = g_malloc(sizeof(*ram_above_4g));
|
||||||
memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", ram,
|
memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", ram,
|
||||||
pcms->below_4g_mem_size,
|
x86ms->below_4g_mem_size,
|
||||||
pcms->above_4g_mem_size);
|
x86ms->above_4g_mem_size);
|
||||||
memory_region_add_subregion(system_memory, 0x100000000ULL,
|
memory_region_add_subregion(system_memory, 0x100000000ULL,
|
||||||
ram_above_4g);
|
ram_above_4g);
|
||||||
e820_add_entry(0x100000000ULL, pcms->above_4g_mem_size, E820_RAM);
|
e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!pcmc->has_reserved_memory &&
|
if (!pcmc->has_reserved_memory &&
|
||||||
|
@ -1188,7 +1192,7 @@ void pc_memory_init(PCMachineState *pcms,
|
||||||
}
|
}
|
||||||
|
|
||||||
machine->device_memory->base =
|
machine->device_memory->base =
|
||||||
ROUND_UP(0x100000000ULL + pcms->above_4g_mem_size, 1 * GiB);
|
ROUND_UP(0x100000000ULL + x86ms->above_4g_mem_size, 1 * GiB);
|
||||||
|
|
||||||
if (pcmc->enforce_aligned_dimm) {
|
if (pcmc->enforce_aligned_dimm) {
|
||||||
/* size device region assuming 1G page max alignment per slot */
|
/* size device region assuming 1G page max alignment per slot */
|
||||||
|
@ -1223,7 +1227,7 @@ void pc_memory_init(PCMachineState *pcms,
|
||||||
1);
|
1);
|
||||||
|
|
||||||
fw_cfg = fw_cfg_arch_create(machine,
|
fw_cfg = fw_cfg_arch_create(machine,
|
||||||
pcms->boot_cpus, pcms->apic_id_limit);
|
x86ms->boot_cpus, x86ms->apic_id_limit);
|
||||||
|
|
||||||
rom_set_fw(fw_cfg);
|
rom_set_fw(fw_cfg);
|
||||||
|
|
||||||
|
@ -1246,10 +1250,10 @@ void pc_memory_init(PCMachineState *pcms,
|
||||||
for (i = 0; i < nb_option_roms; i++) {
|
for (i = 0; i < nb_option_roms; i++) {
|
||||||
rom_add_option(option_rom[i].name, option_rom[i].bootindex);
|
rom_add_option(option_rom[i].name, option_rom[i].bootindex);
|
||||||
}
|
}
|
||||||
pcms->fw_cfg = fw_cfg;
|
x86ms->fw_cfg = fw_cfg;
|
||||||
|
|
||||||
/* Init default IOAPIC address space */
|
/* Init default IOAPIC address space */
|
||||||
pcms->ioapic_as = &address_space_memory;
|
x86ms->ioapic_as = &address_space_memory;
|
||||||
|
|
||||||
/* Init ACPI memory hotplug IO base address */
|
/* Init ACPI memory hotplug IO base address */
|
||||||
pcms->memhp_io_base = ACPI_MEMORY_HOTPLUG_BASE;
|
pcms->memhp_io_base = ACPI_MEMORY_HOTPLUG_BASE;
|
||||||
|
@ -1264,6 +1268,7 @@ uint64_t pc_pci_hole64_start(void)
|
||||||
PCMachineState *pcms = PC_MACHINE(qdev_get_machine());
|
PCMachineState *pcms = PC_MACHINE(qdev_get_machine());
|
||||||
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
|
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
|
||||||
MachineState *ms = MACHINE(pcms);
|
MachineState *ms = MACHINE(pcms);
|
||||||
|
X86MachineState *x86ms = X86_MACHINE(pcms);
|
||||||
uint64_t hole64_start = 0;
|
uint64_t hole64_start = 0;
|
||||||
|
|
||||||
if (pcmc->has_reserved_memory && ms->device_memory->base) {
|
if (pcmc->has_reserved_memory && ms->device_memory->base) {
|
||||||
|
@ -1272,7 +1277,7 @@ uint64_t pc_pci_hole64_start(void)
|
||||||
hole64_start += memory_region_size(&ms->device_memory->mr);
|
hole64_start += memory_region_size(&ms->device_memory->mr);
|
||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
hole64_start = 0x100000000ULL + pcms->above_4g_mem_size;
|
hole64_start = 0x100000000ULL + x86ms->above_4g_mem_size;
|
||||||
}
|
}
|
||||||
|
|
||||||
return ROUND_UP(hole64_start, 1 * GiB);
|
return ROUND_UP(hole64_start, 1 * GiB);
|
||||||
|
@ -1611,6 +1616,7 @@ static void pc_cpu_plug(HotplugHandler *hotplug_dev,
|
||||||
Error *local_err = NULL;
|
Error *local_err = NULL;
|
||||||
X86CPU *cpu = X86_CPU(dev);
|
X86CPU *cpu = X86_CPU(dev);
|
||||||
PCMachineState *pcms = PC_MACHINE(hotplug_dev);
|
PCMachineState *pcms = PC_MACHINE(hotplug_dev);
|
||||||
|
X86MachineState *x86ms = X86_MACHINE(pcms);
|
||||||
|
|
||||||
if (pcms->acpi_dev) {
|
if (pcms->acpi_dev) {
|
||||||
hotplug_handler_plug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err);
|
hotplug_handler_plug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err);
|
||||||
|
@ -1620,12 +1626,12 @@ static void pc_cpu_plug(HotplugHandler *hotplug_dev,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* increment the number of CPUs */
|
/* increment the number of CPUs */
|
||||||
pcms->boot_cpus++;
|
x86ms->boot_cpus++;
|
||||||
if (pcms->rtc) {
|
if (x86ms->rtc) {
|
||||||
rtc_set_cpus_count(pcms->rtc, pcms->boot_cpus);
|
rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus);
|
||||||
}
|
}
|
||||||
if (pcms->fw_cfg) {
|
if (x86ms->fw_cfg) {
|
||||||
fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
|
fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus);
|
||||||
}
|
}
|
||||||
|
|
||||||
found_cpu = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, NULL);
|
found_cpu = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, NULL);
|
||||||
|
@ -1671,6 +1677,7 @@ static void pc_cpu_unplug_cb(HotplugHandler *hotplug_dev,
|
||||||
Error *local_err = NULL;
|
Error *local_err = NULL;
|
||||||
X86CPU *cpu = X86_CPU(dev);
|
X86CPU *cpu = X86_CPU(dev);
|
||||||
PCMachineState *pcms = PC_MACHINE(hotplug_dev);
|
PCMachineState *pcms = PC_MACHINE(hotplug_dev);
|
||||||
|
X86MachineState *x86ms = X86_MACHINE(pcms);
|
||||||
|
|
||||||
hotplug_handler_unplug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err);
|
hotplug_handler_unplug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err);
|
||||||
if (local_err) {
|
if (local_err) {
|
||||||
|
@ -1682,10 +1689,10 @@ static void pc_cpu_unplug_cb(HotplugHandler *hotplug_dev,
|
||||||
object_property_set_bool(OBJECT(dev), false, "realized", NULL);
|
object_property_set_bool(OBJECT(dev), false, "realized", NULL);
|
||||||
|
|
||||||
/* decrement the number of CPUs */
|
/* decrement the number of CPUs */
|
||||||
pcms->boot_cpus--;
|
x86ms->boot_cpus--;
|
||||||
/* Update the number of CPUs in CMOS */
|
/* Update the number of CPUs in CMOS */
|
||||||
rtc_set_cpus_count(pcms->rtc, pcms->boot_cpus);
|
rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus);
|
||||||
fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
|
fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus);
|
||||||
out:
|
out:
|
||||||
error_propagate(errp, local_err);
|
error_propagate(errp, local_err);
|
||||||
}
|
}
|
||||||
|
@ -1701,6 +1708,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
|
||||||
CPUX86State *env = &cpu->env;
|
CPUX86State *env = &cpu->env;
|
||||||
MachineState *ms = MACHINE(hotplug_dev);
|
MachineState *ms = MACHINE(hotplug_dev);
|
||||||
PCMachineState *pcms = PC_MACHINE(hotplug_dev);
|
PCMachineState *pcms = PC_MACHINE(hotplug_dev);
|
||||||
|
X86MachineState *x86ms = X86_MACHINE(pcms);
|
||||||
unsigned int smp_cores = ms->smp.cores;
|
unsigned int smp_cores = ms->smp.cores;
|
||||||
unsigned int smp_threads = ms->smp.threads;
|
unsigned int smp_threads = ms->smp.threads;
|
||||||
|
|
||||||
|
@ -1710,7 +1718,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
env->nr_dies = pcms->smp_dies;
|
env->nr_dies = x86ms->smp_dies;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* If APIC ID is not set,
|
* If APIC ID is not set,
|
||||||
|
@ -1718,13 +1726,13 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
|
||||||
*/
|
*/
|
||||||
if (cpu->apic_id == UNASSIGNED_APIC_ID) {
|
if (cpu->apic_id == UNASSIGNED_APIC_ID) {
|
||||||
int max_socket = (ms->smp.max_cpus - 1) /
|
int max_socket = (ms->smp.max_cpus - 1) /
|
||||||
smp_threads / smp_cores / pcms->smp_dies;
|
smp_threads / smp_cores / x86ms->smp_dies;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* die-id was optional in QEMU 4.0 and older, so keep it optional
|
* die-id was optional in QEMU 4.0 and older, so keep it optional
|
||||||
* if there's only one die per socket.
|
* if there's only one die per socket.
|
||||||
*/
|
*/
|
||||||
if (cpu->die_id < 0 && pcms->smp_dies == 1) {
|
if (cpu->die_id < 0 && x86ms->smp_dies == 1) {
|
||||||
cpu->die_id = 0;
|
cpu->die_id = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1739,9 +1747,9 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
|
||||||
if (cpu->die_id < 0) {
|
if (cpu->die_id < 0) {
|
||||||
error_setg(errp, "CPU die-id is not set");
|
error_setg(errp, "CPU die-id is not set");
|
||||||
return;
|
return;
|
||||||
} else if (cpu->die_id > pcms->smp_dies - 1) {
|
} else if (cpu->die_id > x86ms->smp_dies - 1) {
|
||||||
error_setg(errp, "Invalid CPU die-id: %u must be in range 0:%u",
|
error_setg(errp, "Invalid CPU die-id: %u must be in range 0:%u",
|
||||||
cpu->die_id, pcms->smp_dies - 1);
|
cpu->die_id, x86ms->smp_dies - 1);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
if (cpu->core_id < 0) {
|
if (cpu->core_id < 0) {
|
||||||
|
@ -1765,7 +1773,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
|
||||||
topo.die_id = cpu->die_id;
|
topo.die_id = cpu->die_id;
|
||||||
topo.core_id = cpu->core_id;
|
topo.core_id = cpu->core_id;
|
||||||
topo.smt_id = cpu->thread_id;
|
topo.smt_id = cpu->thread_id;
|
||||||
cpu->apic_id = apicid_from_topo_ids(pcms->smp_dies, smp_cores,
|
cpu->apic_id = apicid_from_topo_ids(x86ms->smp_dies, smp_cores,
|
||||||
smp_threads, &topo);
|
smp_threads, &topo);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1773,7 +1781,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
|
||||||
if (!cpu_slot) {
|
if (!cpu_slot) {
|
||||||
MachineState *ms = MACHINE(pcms);
|
MachineState *ms = MACHINE(pcms);
|
||||||
|
|
||||||
x86_topo_ids_from_apicid(cpu->apic_id, pcms->smp_dies,
|
x86_topo_ids_from_apicid(cpu->apic_id, x86ms->smp_dies,
|
||||||
smp_cores, smp_threads, &topo);
|
smp_cores, smp_threads, &topo);
|
||||||
error_setg(errp,
|
error_setg(errp,
|
||||||
"Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with"
|
"Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with"
|
||||||
|
@ -1795,7 +1803,7 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev,
|
||||||
/* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn()
|
/* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn()
|
||||||
* once -smp refactoring is complete and there will be CPU private
|
* once -smp refactoring is complete and there will be CPU private
|
||||||
* CPUState::nr_cores and CPUState::nr_threads fields instead of globals */
|
* CPUState::nr_cores and CPUState::nr_threads fields instead of globals */
|
||||||
x86_topo_ids_from_apicid(cpu->apic_id, pcms->smp_dies,
|
x86_topo_ids_from_apicid(cpu->apic_id, x86ms->smp_dies,
|
||||||
smp_cores, smp_threads, &topo);
|
smp_cores, smp_threads, &topo);
|
||||||
if (cpu->socket_id != -1 && cpu->socket_id != topo.pkg_id) {
|
if (cpu->socket_id != -1 && cpu->socket_id != topo.pkg_id) {
|
||||||
error_setg(errp, "property socket-id: %u doesn't match set apic-id:"
|
error_setg(errp, "property socket-id: %u doesn't match set apic-id:"
|
||||||
|
@ -1977,45 +1985,6 @@ pc_machine_get_device_memory_region_size(Object *obj, Visitor *v,
|
||||||
visit_type_int(v, name, &value, errp);
|
visit_type_int(v, name, &value, errp);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void pc_machine_get_max_ram_below_4g(Object *obj, Visitor *v,
|
|
||||||
const char *name, void *opaque,
|
|
||||||
Error **errp)
|
|
||||||
{
|
|
||||||
PCMachineState *pcms = PC_MACHINE(obj);
|
|
||||||
uint64_t value = pcms->max_ram_below_4g;
|
|
||||||
|
|
||||||
visit_type_size(v, name, &value, errp);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void pc_machine_set_max_ram_below_4g(Object *obj, Visitor *v,
|
|
||||||
const char *name, void *opaque,
|
|
||||||
Error **errp)
|
|
||||||
{
|
|
||||||
PCMachineState *pcms = PC_MACHINE(obj);
|
|
||||||
Error *error = NULL;
|
|
||||||
uint64_t value;
|
|
||||||
|
|
||||||
visit_type_size(v, name, &value, &error);
|
|
||||||
if (error) {
|
|
||||||
error_propagate(errp, error);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
if (value > 4 * GiB) {
|
|
||||||
error_setg(&error,
|
|
||||||
"Machine option 'max-ram-below-4g=%"PRIu64
|
|
||||||
"' expects size less than or equal to 4G", value);
|
|
||||||
error_propagate(errp, error);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (value < 1 * MiB) {
|
|
||||||
warn_report("Only %" PRIu64 " bytes of RAM below the 4GiB boundary,"
|
|
||||||
"BIOS may not work with less than 1MiB", value);
|
|
||||||
}
|
|
||||||
|
|
||||||
pcms->max_ram_below_4g = value;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void pc_machine_get_vmport(Object *obj, Visitor *v, const char *name,
|
static void pc_machine_get_vmport(Object *obj, Visitor *v, const char *name,
|
||||||
void *opaque, Error **errp)
|
void *opaque, Error **errp)
|
||||||
{
|
{
|
||||||
|
@ -2121,7 +2090,6 @@ static void pc_machine_initfn(Object *obj)
|
||||||
{
|
{
|
||||||
PCMachineState *pcms = PC_MACHINE(obj);
|
PCMachineState *pcms = PC_MACHINE(obj);
|
||||||
|
|
||||||
pcms->max_ram_below_4g = 0; /* use default */
|
|
||||||
pcms->smm = ON_OFF_AUTO_AUTO;
|
pcms->smm = ON_OFF_AUTO_AUTO;
|
||||||
#ifdef CONFIG_VMPORT
|
#ifdef CONFIG_VMPORT
|
||||||
pcms->vmport = ON_OFF_AUTO_AUTO;
|
pcms->vmport = ON_OFF_AUTO_AUTO;
|
||||||
|
@ -2133,7 +2101,6 @@ static void pc_machine_initfn(Object *obj)
|
||||||
pcms->smbus_enabled = true;
|
pcms->smbus_enabled = true;
|
||||||
pcms->sata_enabled = true;
|
pcms->sata_enabled = true;
|
||||||
pcms->pit_enabled = true;
|
pcms->pit_enabled = true;
|
||||||
pcms->smp_dies = 1;
|
|
||||||
|
|
||||||
pc_system_flash_create(pcms);
|
pc_system_flash_create(pcms);
|
||||||
}
|
}
|
||||||
|
@ -2164,23 +2131,6 @@ static void pc_machine_wakeup(MachineState *machine)
|
||||||
cpu_synchronize_all_post_reset();
|
cpu_synchronize_all_post_reset();
|
||||||
}
|
}
|
||||||
|
|
||||||
static void x86_nmi(NMIState *n, int cpu_index, Error **errp)
|
|
||||||
{
|
|
||||||
/* cpu index isn't used */
|
|
||||||
CPUState *cs;
|
|
||||||
|
|
||||||
CPU_FOREACH(cs) {
|
|
||||||
X86CPU *cpu = X86_CPU(cs);
|
|
||||||
|
|
||||||
if (!cpu->apic_state) {
|
|
||||||
cpu_interrupt(cs, CPU_INTERRUPT_NMI);
|
|
||||||
} else {
|
|
||||||
apic_deliver_nmi(cpu->apic_state);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static bool pc_hotplug_allowed(MachineState *ms, DeviceState *dev, Error **errp)
|
static bool pc_hotplug_allowed(MachineState *ms, DeviceState *dev, Error **errp)
|
||||||
{
|
{
|
||||||
X86IOMMUState *iommu = x86_iommu_get_default();
|
X86IOMMUState *iommu = x86_iommu_get_default();
|
||||||
|
@ -2205,7 +2155,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data)
|
||||||
MachineClass *mc = MACHINE_CLASS(oc);
|
MachineClass *mc = MACHINE_CLASS(oc);
|
||||||
PCMachineClass *pcmc = PC_MACHINE_CLASS(oc);
|
PCMachineClass *pcmc = PC_MACHINE_CLASS(oc);
|
||||||
HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
|
HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
|
||||||
NMIClass *nc = NMI_CLASS(oc);
|
|
||||||
|
|
||||||
pcmc->pci_enabled = true;
|
pcmc->pci_enabled = true;
|
||||||
pcmc->has_acpi_build = true;
|
pcmc->has_acpi_build = true;
|
||||||
|
@ -2241,7 +2190,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data)
|
||||||
hc->plug = pc_machine_device_plug_cb;
|
hc->plug = pc_machine_device_plug_cb;
|
||||||
hc->unplug_request = pc_machine_device_unplug_request_cb;
|
hc->unplug_request = pc_machine_device_unplug_request_cb;
|
||||||
hc->unplug = pc_machine_device_unplug_cb;
|
hc->unplug = pc_machine_device_unplug_cb;
|
||||||
nc->nmi_monitor_handler = x86_nmi;
|
|
||||||
mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE;
|
mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE;
|
||||||
mc->nvdimm_supported = true;
|
mc->nvdimm_supported = true;
|
||||||
mc->numa_mem_supported = true;
|
mc->numa_mem_supported = true;
|
||||||
|
@ -2250,13 +2198,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data)
|
||||||
pc_machine_get_device_memory_region_size, NULL,
|
pc_machine_get_device_memory_region_size, NULL,
|
||||||
NULL, NULL, &error_abort);
|
NULL, NULL, &error_abort);
|
||||||
|
|
||||||
object_class_property_add(oc, PC_MACHINE_MAX_RAM_BELOW_4G, "size",
|
|
||||||
pc_machine_get_max_ram_below_4g, pc_machine_set_max_ram_below_4g,
|
|
||||||
NULL, NULL, &error_abort);
|
|
||||||
|
|
||||||
object_class_property_set_description(oc, PC_MACHINE_MAX_RAM_BELOW_4G,
|
|
||||||
"Maximum ram below the 4G boundary (32bit boundary)", &error_abort);
|
|
||||||
|
|
||||||
object_class_property_add(oc, PC_MACHINE_SMM, "OnOffAuto",
|
object_class_property_add(oc, PC_MACHINE_SMM, "OnOffAuto",
|
||||||
pc_machine_get_smm, pc_machine_set_smm,
|
pc_machine_get_smm, pc_machine_set_smm,
|
||||||
NULL, NULL, &error_abort);
|
NULL, NULL, &error_abort);
|
||||||
|
@ -2281,7 +2222,7 @@ static void pc_machine_class_init(ObjectClass *oc, void *data)
|
||||||
|
|
||||||
static const TypeInfo pc_machine_info = {
|
static const TypeInfo pc_machine_info = {
|
||||||
.name = TYPE_PC_MACHINE,
|
.name = TYPE_PC_MACHINE,
|
||||||
.parent = TYPE_MACHINE,
|
.parent = TYPE_X86_MACHINE,
|
||||||
.abstract = true,
|
.abstract = true,
|
||||||
.instance_size = sizeof(PCMachineState),
|
.instance_size = sizeof(PCMachineState),
|
||||||
.instance_init = pc_machine_initfn,
|
.instance_init = pc_machine_initfn,
|
||||||
|
@ -2289,7 +2230,6 @@ static const TypeInfo pc_machine_info = {
|
||||||
.class_init = pc_machine_class_init,
|
.class_init = pc_machine_class_init,
|
||||||
.interfaces = (InterfaceInfo[]) {
|
.interfaces = (InterfaceInfo[]) {
|
||||||
{ TYPE_HOTPLUG_HANDLER },
|
{ TYPE_HOTPLUG_HANDLER },
|
||||||
{ TYPE_NMI },
|
|
||||||
{ }
|
{ }
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
|
@ -74,6 +74,7 @@ static void pc_init1(MachineState *machine,
|
||||||
{
|
{
|
||||||
PCMachineState *pcms = PC_MACHINE(machine);
|
PCMachineState *pcms = PC_MACHINE(machine);
|
||||||
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
|
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
|
||||||
|
X86MachineState *x86ms = X86_MACHINE(machine);
|
||||||
MemoryRegion *system_memory = get_system_memory();
|
MemoryRegion *system_memory = get_system_memory();
|
||||||
MemoryRegion *system_io = get_system_io();
|
MemoryRegion *system_io = get_system_io();
|
||||||
int i;
|
int i;
|
||||||
|
@ -126,11 +127,11 @@ static void pc_init1(MachineState *machine,
|
||||||
if (xen_enabled()) {
|
if (xen_enabled()) {
|
||||||
xen_hvm_init(pcms, &ram_memory);
|
xen_hvm_init(pcms, &ram_memory);
|
||||||
} else {
|
} else {
|
||||||
if (!pcms->max_ram_below_4g) {
|
if (!x86ms->max_ram_below_4g) {
|
||||||
pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */
|
x86ms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */
|
||||||
}
|
}
|
||||||
lowmem = pcms->max_ram_below_4g;
|
lowmem = x86ms->max_ram_below_4g;
|
||||||
if (machine->ram_size >= pcms->max_ram_below_4g) {
|
if (machine->ram_size >= x86ms->max_ram_below_4g) {
|
||||||
if (pcmc->gigabyte_align) {
|
if (pcmc->gigabyte_align) {
|
||||||
if (lowmem > 0xc0000000) {
|
if (lowmem > 0xc0000000) {
|
||||||
lowmem = 0xc0000000;
|
lowmem = 0xc0000000;
|
||||||
|
@ -139,17 +140,17 @@ static void pc_init1(MachineState *machine,
|
||||||
warn_report("Large machine and max_ram_below_4g "
|
warn_report("Large machine and max_ram_below_4g "
|
||||||
"(%" PRIu64 ") not a multiple of 1G; "
|
"(%" PRIu64 ") not a multiple of 1G; "
|
||||||
"possible bad performance.",
|
"possible bad performance.",
|
||||||
pcms->max_ram_below_4g);
|
x86ms->max_ram_below_4g);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (machine->ram_size >= lowmem) {
|
if (machine->ram_size >= lowmem) {
|
||||||
pcms->above_4g_mem_size = machine->ram_size - lowmem;
|
x86ms->above_4g_mem_size = machine->ram_size - lowmem;
|
||||||
pcms->below_4g_mem_size = lowmem;
|
x86ms->below_4g_mem_size = lowmem;
|
||||||
} else {
|
} else {
|
||||||
pcms->above_4g_mem_size = 0;
|
x86ms->above_4g_mem_size = 0;
|
||||||
pcms->below_4g_mem_size = machine->ram_size;
|
x86ms->below_4g_mem_size = machine->ram_size;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -191,19 +192,19 @@ static void pc_init1(MachineState *machine,
|
||||||
gsi_state = g_malloc0(sizeof(*gsi_state));
|
gsi_state = g_malloc0(sizeof(*gsi_state));
|
||||||
if (kvm_ioapic_in_kernel()) {
|
if (kvm_ioapic_in_kernel()) {
|
||||||
kvm_pc_setup_irq_routing(pcmc->pci_enabled);
|
kvm_pc_setup_irq_routing(pcmc->pci_enabled);
|
||||||
pcms->gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state,
|
x86ms->gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state,
|
||||||
GSI_NUM_PINS);
|
GSI_NUM_PINS);
|
||||||
} else {
|
} else {
|
||||||
pcms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
|
x86ms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (pcmc->pci_enabled) {
|
if (pcmc->pci_enabled) {
|
||||||
pci_bus = i440fx_init(host_type,
|
pci_bus = i440fx_init(host_type,
|
||||||
pci_type,
|
pci_type,
|
||||||
&i440fx_state, &piix3_devfn, &isa_bus, pcms->gsi,
|
&i440fx_state, &piix3_devfn, &isa_bus, x86ms->gsi,
|
||||||
system_memory, system_io, machine->ram_size,
|
system_memory, system_io, machine->ram_size,
|
||||||
pcms->below_4g_mem_size,
|
x86ms->below_4g_mem_size,
|
||||||
pcms->above_4g_mem_size,
|
x86ms->above_4g_mem_size,
|
||||||
pci_memory, ram_memory);
|
pci_memory, ram_memory);
|
||||||
pcms->bus = pci_bus;
|
pcms->bus = pci_bus;
|
||||||
} else {
|
} else {
|
||||||
|
@ -213,7 +214,7 @@ static void pc_init1(MachineState *machine,
|
||||||
&error_abort);
|
&error_abort);
|
||||||
no_hpet = 1;
|
no_hpet = 1;
|
||||||
}
|
}
|
||||||
isa_bus_irqs(isa_bus, pcms->gsi);
|
isa_bus_irqs(isa_bus, x86ms->gsi);
|
||||||
|
|
||||||
if (kvm_pic_in_kernel()) {
|
if (kvm_pic_in_kernel()) {
|
||||||
i8259 = kvm_i8259_init(isa_bus);
|
i8259 = kvm_i8259_init(isa_bus);
|
||||||
|
@ -231,7 +232,7 @@ static void pc_init1(MachineState *machine,
|
||||||
ioapic_init_gsi(gsi_state, "i440fx");
|
ioapic_init_gsi(gsi_state, "i440fx");
|
||||||
}
|
}
|
||||||
|
|
||||||
pc_register_ferr_irq(pcms->gsi[13]);
|
pc_register_ferr_irq(x86ms->gsi[13]);
|
||||||
|
|
||||||
pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL);
|
pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL);
|
||||||
|
|
||||||
|
@ -241,7 +242,7 @@ static void pc_init1(MachineState *machine,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* init basic PC hardware */
|
/* init basic PC hardware */
|
||||||
pc_basic_device_init(isa_bus, pcms->gsi, &rtc_state, true,
|
pc_basic_device_init(isa_bus, x86ms->gsi, &rtc_state, true,
|
||||||
(pcms->vmport != ON_OFF_AUTO_ON), pcms->pit_enabled,
|
(pcms->vmport != ON_OFF_AUTO_ON), pcms->pit_enabled,
|
||||||
0x4);
|
0x4);
|
||||||
|
|
||||||
|
@ -288,7 +289,7 @@ else {
|
||||||
smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
|
smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
|
||||||
/* TODO: Populate SPD eeprom data. */
|
/* TODO: Populate SPD eeprom data. */
|
||||||
pcms->smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
|
pcms->smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
|
||||||
pcms->gsi[9], smi_irq,
|
x86ms->gsi[9], smi_irq,
|
||||||
pc_machine_is_smm_enabled(pcms),
|
pc_machine_is_smm_enabled(pcms),
|
||||||
&piix4_pm);
|
&piix4_pm);
|
||||||
smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
|
smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
|
||||||
|
@ -304,7 +305,7 @@ else {
|
||||||
|
|
||||||
if (machine->nvdimms_state->is_enabled) {
|
if (machine->nvdimms_state->is_enabled) {
|
||||||
nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
|
nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
|
||||||
pcms->fw_cfg, OBJECT(pcms));
|
x86ms->fw_cfg, OBJECT(pcms));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -729,7 +730,7 @@ DEFINE_I440FX_MACHINE(v1_4, "pc-i440fx-1.4", pc_compat_1_4_fn,
|
||||||
|
|
||||||
static void pc_i440fx_1_3_machine_options(MachineClass *m)
|
static void pc_i440fx_1_3_machine_options(MachineClass *m)
|
||||||
{
|
{
|
||||||
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
|
X86MachineClass *x86mc = X86_MACHINE_CLASS(m);
|
||||||
static GlobalProperty compat[] = {
|
static GlobalProperty compat[] = {
|
||||||
PC_CPU_MODEL_IDS("1.3.0")
|
PC_CPU_MODEL_IDS("1.3.0")
|
||||||
{ "usb-tablet", "usb_version", "1" },
|
{ "usb-tablet", "usb_version", "1" },
|
||||||
|
@ -740,7 +741,7 @@ static void pc_i440fx_1_3_machine_options(MachineClass *m)
|
||||||
|
|
||||||
pc_i440fx_1_4_machine_options(m);
|
pc_i440fx_1_4_machine_options(m);
|
||||||
m->hw_version = "1.3.0";
|
m->hw_version = "1.3.0";
|
||||||
pcmc->compat_apic_id_mode = true;
|
x86mc->compat_apic_id_mode = true;
|
||||||
compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
|
compat_props_add(m->compat_props, compat, G_N_ELEMENTS(compat));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -116,6 +116,7 @@ static void pc_q35_init(MachineState *machine)
|
||||||
{
|
{
|
||||||
PCMachineState *pcms = PC_MACHINE(machine);
|
PCMachineState *pcms = PC_MACHINE(machine);
|
||||||
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
|
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
|
||||||
|
X86MachineState *x86ms = X86_MACHINE(machine);
|
||||||
Q35PCIHost *q35_host;
|
Q35PCIHost *q35_host;
|
||||||
PCIHostState *phb;
|
PCIHostState *phb;
|
||||||
PCIBus *host_bus;
|
PCIBus *host_bus;
|
||||||
|
@ -153,27 +154,27 @@ static void pc_q35_init(MachineState *machine)
|
||||||
/* Handle the machine opt max-ram-below-4g. It is basically doing
|
/* Handle the machine opt max-ram-below-4g. It is basically doing
|
||||||
* min(qemu limit, user limit).
|
* min(qemu limit, user limit).
|
||||||
*/
|
*/
|
||||||
if (!pcms->max_ram_below_4g) {
|
if (!x86ms->max_ram_below_4g) {
|
||||||
pcms->max_ram_below_4g = 1ULL << 32; /* default: 4G */;
|
x86ms->max_ram_below_4g = 4 * GiB;
|
||||||
}
|
}
|
||||||
if (lowmem > pcms->max_ram_below_4g) {
|
if (lowmem > x86ms->max_ram_below_4g) {
|
||||||
lowmem = pcms->max_ram_below_4g;
|
lowmem = x86ms->max_ram_below_4g;
|
||||||
if (machine->ram_size - lowmem > lowmem &&
|
if (machine->ram_size - lowmem > lowmem &&
|
||||||
lowmem & (1 * GiB - 1)) {
|
lowmem & (1 * GiB - 1)) {
|
||||||
warn_report("There is possibly poor performance as the ram size "
|
warn_report("There is possibly poor performance as the ram size "
|
||||||
" (0x%" PRIx64 ") is more then twice the size of"
|
" (0x%" PRIx64 ") is more then twice the size of"
|
||||||
" max-ram-below-4g (%"PRIu64") and"
|
" max-ram-below-4g (%"PRIu64") and"
|
||||||
" max-ram-below-4g is not a multiple of 1G.",
|
" max-ram-below-4g is not a multiple of 1G.",
|
||||||
(uint64_t)machine->ram_size, pcms->max_ram_below_4g);
|
(uint64_t)machine->ram_size, x86ms->max_ram_below_4g);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (machine->ram_size >= lowmem) {
|
if (machine->ram_size >= lowmem) {
|
||||||
pcms->above_4g_mem_size = machine->ram_size - lowmem;
|
x86ms->above_4g_mem_size = machine->ram_size - lowmem;
|
||||||
pcms->below_4g_mem_size = lowmem;
|
x86ms->below_4g_mem_size = lowmem;
|
||||||
} else {
|
} else {
|
||||||
pcms->above_4g_mem_size = 0;
|
x86ms->above_4g_mem_size = 0;
|
||||||
pcms->below_4g_mem_size = machine->ram_size;
|
x86ms->below_4g_mem_size = machine->ram_size;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (xen_enabled()) {
|
if (xen_enabled()) {
|
||||||
|
@ -214,10 +215,10 @@ static void pc_q35_init(MachineState *machine)
|
||||||
gsi_state = g_malloc0(sizeof(*gsi_state));
|
gsi_state = g_malloc0(sizeof(*gsi_state));
|
||||||
if (kvm_ioapic_in_kernel()) {
|
if (kvm_ioapic_in_kernel()) {
|
||||||
kvm_pc_setup_irq_routing(pcmc->pci_enabled);
|
kvm_pc_setup_irq_routing(pcmc->pci_enabled);
|
||||||
pcms->gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state,
|
x86ms->gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state,
|
||||||
GSI_NUM_PINS);
|
GSI_NUM_PINS);
|
||||||
} else {
|
} else {
|
||||||
pcms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
|
x86ms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* create pci host bus */
|
/* create pci host bus */
|
||||||
|
@ -232,9 +233,9 @@ static void pc_q35_init(MachineState *machine)
|
||||||
MCH_HOST_PROP_SYSTEM_MEM, NULL);
|
MCH_HOST_PROP_SYSTEM_MEM, NULL);
|
||||||
object_property_set_link(OBJECT(q35_host), OBJECT(system_io),
|
object_property_set_link(OBJECT(q35_host), OBJECT(system_io),
|
||||||
MCH_HOST_PROP_IO_MEM, NULL);
|
MCH_HOST_PROP_IO_MEM, NULL);
|
||||||
object_property_set_int(OBJECT(q35_host), pcms->below_4g_mem_size,
|
object_property_set_int(OBJECT(q35_host), x86ms->below_4g_mem_size,
|
||||||
PCI_HOST_BELOW_4G_MEM_SIZE, NULL);
|
PCI_HOST_BELOW_4G_MEM_SIZE, NULL);
|
||||||
object_property_set_int(OBJECT(q35_host), pcms->above_4g_mem_size,
|
object_property_set_int(OBJECT(q35_host), x86ms->above_4g_mem_size,
|
||||||
PCI_HOST_ABOVE_4G_MEM_SIZE, NULL);
|
PCI_HOST_ABOVE_4G_MEM_SIZE, NULL);
|
||||||
/* pci */
|
/* pci */
|
||||||
qdev_init_nofail(DEVICE(q35_host));
|
qdev_init_nofail(DEVICE(q35_host));
|
||||||
|
@ -256,7 +257,7 @@ static void pc_q35_init(MachineState *machine)
|
||||||
ich9_lpc = ICH9_LPC_DEVICE(lpc);
|
ich9_lpc = ICH9_LPC_DEVICE(lpc);
|
||||||
lpc_dev = DEVICE(lpc);
|
lpc_dev = DEVICE(lpc);
|
||||||
for (i = 0; i < GSI_NUM_PINS; i++) {
|
for (i = 0; i < GSI_NUM_PINS; i++) {
|
||||||
qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, pcms->gsi[i]);
|
qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, x86ms->gsi[i]);
|
||||||
}
|
}
|
||||||
pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc_map_irq, ich9_lpc,
|
pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc_map_irq, ich9_lpc,
|
||||||
ICH9_LPC_NB_PIRQS);
|
ICH9_LPC_NB_PIRQS);
|
||||||
|
@ -280,7 +281,7 @@ static void pc_q35_init(MachineState *machine)
|
||||||
ioapic_init_gsi(gsi_state, "q35");
|
ioapic_init_gsi(gsi_state, "q35");
|
||||||
}
|
}
|
||||||
|
|
||||||
pc_register_ferr_irq(pcms->gsi[13]);
|
pc_register_ferr_irq(x86ms->gsi[13]);
|
||||||
|
|
||||||
assert(pcms->vmport != ON_OFF_AUTO__MAX);
|
assert(pcms->vmport != ON_OFF_AUTO__MAX);
|
||||||
if (pcms->vmport == ON_OFF_AUTO_AUTO) {
|
if (pcms->vmport == ON_OFF_AUTO_AUTO) {
|
||||||
|
@ -288,7 +289,7 @@ static void pc_q35_init(MachineState *machine)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* init basic PC hardware */
|
/* init basic PC hardware */
|
||||||
pc_basic_device_init(isa_bus, pcms->gsi, &rtc_state, !mc->no_floppy,
|
pc_basic_device_init(isa_bus, x86ms->gsi, &rtc_state, !mc->no_floppy,
|
||||||
(pcms->vmport != ON_OFF_AUTO_ON), pcms->pit_enabled,
|
(pcms->vmport != ON_OFF_AUTO_ON), pcms->pit_enabled,
|
||||||
0xff0104);
|
0xff0104);
|
||||||
|
|
||||||
|
@ -331,7 +332,7 @@ static void pc_q35_init(MachineState *machine)
|
||||||
|
|
||||||
if (machine->nvdimms_state->is_enabled) {
|
if (machine->nvdimms_state->is_enabled) {
|
||||||
nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
|
nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
|
||||||
pcms->fw_cfg, OBJECT(pcms));
|
x86ms->fw_cfg, OBJECT(pcms));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
138
hw/i386/x86.c
138
hw/i386/x86.c
|
@ -65,13 +65,14 @@ uint32_t x86_cpu_apic_id_from_index(PCMachineState *pcms,
|
||||||
unsigned int cpu_index)
|
unsigned int cpu_index)
|
||||||
{
|
{
|
||||||
MachineState *ms = MACHINE(pcms);
|
MachineState *ms = MACHINE(pcms);
|
||||||
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
|
X86MachineState *x86ms = X86_MACHINE(pcms);
|
||||||
|
X86MachineClass *x86mc = X86_MACHINE_GET_CLASS(x86ms);
|
||||||
uint32_t correct_id;
|
uint32_t correct_id;
|
||||||
static bool warned;
|
static bool warned;
|
||||||
|
|
||||||
correct_id = x86_apicid_from_cpu_idx(pcms->smp_dies, ms->smp.cores,
|
correct_id = x86_apicid_from_cpu_idx(x86ms->smp_dies, ms->smp.cores,
|
||||||
ms->smp.threads, cpu_index);
|
ms->smp.threads, cpu_index);
|
||||||
if (pcmc->compat_apic_id_mode) {
|
if (x86mc->compat_apic_id_mode) {
|
||||||
if (cpu_index != correct_id && !warned && !qtest_enabled()) {
|
if (cpu_index != correct_id && !warned && !qtest_enabled()) {
|
||||||
error_report("APIC IDs set in compatibility mode, "
|
error_report("APIC IDs set in compatibility mode, "
|
||||||
"CPU topology won't match the configuration");
|
"CPU topology won't match the configuration");
|
||||||
|
@ -88,11 +89,12 @@ void x86_cpu_new(PCMachineState *pcms, int64_t apic_id, Error **errp)
|
||||||
Object *cpu = NULL;
|
Object *cpu = NULL;
|
||||||
Error *local_err = NULL;
|
Error *local_err = NULL;
|
||||||
CPUX86State *env = NULL;
|
CPUX86State *env = NULL;
|
||||||
|
X86MachineState *x86ms = X86_MACHINE(pcms);
|
||||||
|
|
||||||
cpu = object_new(MACHINE(pcms)->cpu_type);
|
cpu = object_new(MACHINE(pcms)->cpu_type);
|
||||||
|
|
||||||
env = &X86_CPU(cpu)->env;
|
env = &X86_CPU(cpu)->env;
|
||||||
env->nr_dies = pcms->smp_dies;
|
env->nr_dies = x86ms->smp_dies;
|
||||||
|
|
||||||
object_property_set_uint(cpu, apic_id, "apic-id", &local_err);
|
object_property_set_uint(cpu, apic_id, "apic-id", &local_err);
|
||||||
object_property_set_bool(cpu, true, "realized", &local_err);
|
object_property_set_bool(cpu, true, "realized", &local_err);
|
||||||
|
@ -108,6 +110,7 @@ void x86_cpus_init(PCMachineState *pcms)
|
||||||
MachineState *ms = MACHINE(pcms);
|
MachineState *ms = MACHINE(pcms);
|
||||||
MachineClass *mc = MACHINE_GET_CLASS(pcms);
|
MachineClass *mc = MACHINE_GET_CLASS(pcms);
|
||||||
PCMachineClass *pcmc = PC_MACHINE_CLASS(mc);
|
PCMachineClass *pcmc = PC_MACHINE_CLASS(mc);
|
||||||
|
X86MachineState *x86ms = X86_MACHINE(pcms);
|
||||||
|
|
||||||
x86_cpu_set_default_version(pcmc->default_cpu_version);
|
x86_cpu_set_default_version(pcmc->default_cpu_version);
|
||||||
|
|
||||||
|
@ -119,7 +122,7 @@ void x86_cpus_init(PCMachineState *pcms)
|
||||||
*
|
*
|
||||||
* This is used for FW_CFG_MAX_CPUS. See comments on fw_cfg_arch_create().
|
* This is used for FW_CFG_MAX_CPUS. See comments on fw_cfg_arch_create().
|
||||||
*/
|
*/
|
||||||
pcms->apic_id_limit = x86_cpu_apic_id_from_index(pcms,
|
x86ms->apic_id_limit = x86_cpu_apic_id_from_index(pcms,
|
||||||
ms->smp.max_cpus - 1) + 1;
|
ms->smp.max_cpus - 1) + 1;
|
||||||
possible_cpus = mc->possible_cpu_arch_ids(ms);
|
possible_cpus = mc->possible_cpu_arch_ids(ms);
|
||||||
for (i = 0; i < ms->smp.cpus; i++) {
|
for (i = 0; i < ms->smp.cpus; i++) {
|
||||||
|
@ -140,11 +143,11 @@ x86_cpu_index_to_props(MachineState *ms, unsigned cpu_index)
|
||||||
int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx)
|
int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx)
|
||||||
{
|
{
|
||||||
X86CPUTopoInfo topo;
|
X86CPUTopoInfo topo;
|
||||||
PCMachineState *pcms = PC_MACHINE(ms);
|
X86MachineState *x86ms = X86_MACHINE(ms);
|
||||||
|
|
||||||
assert(idx < ms->possible_cpus->len);
|
assert(idx < ms->possible_cpus->len);
|
||||||
x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id,
|
x86_topo_ids_from_apicid(ms->possible_cpus->cpus[idx].arch_id,
|
||||||
pcms->smp_dies, ms->smp.cores,
|
x86ms->smp_dies, ms->smp.cores,
|
||||||
ms->smp.threads, &topo);
|
ms->smp.threads, &topo);
|
||||||
return topo.pkg_id % ms->numa_state->num_nodes;
|
return topo.pkg_id % ms->numa_state->num_nodes;
|
||||||
}
|
}
|
||||||
|
@ -152,6 +155,7 @@ int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx)
|
||||||
const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms)
|
const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms)
|
||||||
{
|
{
|
||||||
PCMachineState *pcms = PC_MACHINE(ms);
|
PCMachineState *pcms = PC_MACHINE(ms);
|
||||||
|
X86MachineState *x86ms = X86_MACHINE(ms);
|
||||||
int i;
|
int i;
|
||||||
unsigned int max_cpus = ms->smp.max_cpus;
|
unsigned int max_cpus = ms->smp.max_cpus;
|
||||||
|
|
||||||
|
@ -175,11 +179,11 @@ const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms)
|
||||||
ms->possible_cpus->cpus[i].arch_id =
|
ms->possible_cpus->cpus[i].arch_id =
|
||||||
x86_cpu_apic_id_from_index(pcms, i);
|
x86_cpu_apic_id_from_index(pcms, i);
|
||||||
x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id,
|
x86_topo_ids_from_apicid(ms->possible_cpus->cpus[i].arch_id,
|
||||||
pcms->smp_dies, ms->smp.cores,
|
x86ms->smp_dies, ms->smp.cores,
|
||||||
ms->smp.threads, &topo);
|
ms->smp.threads, &topo);
|
||||||
ms->possible_cpus->cpus[i].props.has_socket_id = true;
|
ms->possible_cpus->cpus[i].props.has_socket_id = true;
|
||||||
ms->possible_cpus->cpus[i].props.socket_id = topo.pkg_id;
|
ms->possible_cpus->cpus[i].props.socket_id = topo.pkg_id;
|
||||||
if (pcms->smp_dies > 1) {
|
if (x86ms->smp_dies > 1) {
|
||||||
ms->possible_cpus->cpus[i].props.has_die_id = true;
|
ms->possible_cpus->cpus[i].props.has_die_id = true;
|
||||||
ms->possible_cpus->cpus[i].props.die_id = topo.die_id;
|
ms->possible_cpus->cpus[i].props.die_id = topo.die_id;
|
||||||
}
|
}
|
||||||
|
@ -191,6 +195,22 @@ const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms)
|
||||||
return ms->possible_cpus;
|
return ms->possible_cpus;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void x86_nmi(NMIState *n, int cpu_index, Error **errp)
|
||||||
|
{
|
||||||
|
/* cpu index isn't used */
|
||||||
|
CPUState *cs;
|
||||||
|
|
||||||
|
CPU_FOREACH(cs) {
|
||||||
|
X86CPU *cpu = X86_CPU(cs);
|
||||||
|
|
||||||
|
if (!cpu->apic_state) {
|
||||||
|
cpu_interrupt(cs, CPU_INTERRUPT_NMI);
|
||||||
|
} else {
|
||||||
|
apic_deliver_nmi(cpu->apic_state);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
static long get_file_size(FILE *f)
|
static long get_file_size(FILE *f)
|
||||||
{
|
{
|
||||||
long where, size;
|
long where, size;
|
||||||
|
@ -328,6 +348,7 @@ void x86_load_linux(PCMachineState *pcms,
|
||||||
char *vmode;
|
char *vmode;
|
||||||
MachineState *machine = MACHINE(pcms);
|
MachineState *machine = MACHINE(pcms);
|
||||||
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
|
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
|
||||||
|
X86MachineState *x86ms = X86_MACHINE(pcms);
|
||||||
struct setup_data *setup_data;
|
struct setup_data *setup_data;
|
||||||
const char *kernel_filename = machine->kernel_filename;
|
const char *kernel_filename = machine->kernel_filename;
|
||||||
const char *initrd_filename = machine->initrd_filename;
|
const char *initrd_filename = machine->initrd_filename;
|
||||||
|
@ -400,11 +421,12 @@ void x86_load_linux(PCMachineState *pcms,
|
||||||
initrd_filename, gerr->message);
|
initrd_filename, gerr->message);
|
||||||
exit(1);
|
exit(1);
|
||||||
}
|
}
|
||||||
pcms->initrd_mapped_file = mapped_file;
|
x86ms->initrd_mapped_file = mapped_file;
|
||||||
|
|
||||||
initrd_data = g_mapped_file_get_contents(mapped_file);
|
initrd_data = g_mapped_file_get_contents(mapped_file);
|
||||||
initrd_size = g_mapped_file_get_length(mapped_file);
|
initrd_size = g_mapped_file_get_length(mapped_file);
|
||||||
initrd_max = pcms->below_4g_mem_size - pcmc->acpi_data_size - 1;
|
initrd_max =
|
||||||
|
x86ms->below_4g_mem_size - pcmc->acpi_data_size - 1;
|
||||||
if (initrd_size >= initrd_max) {
|
if (initrd_size >= initrd_max) {
|
||||||
fprintf(stderr, "qemu: initrd is too large, cannot support."
|
fprintf(stderr, "qemu: initrd is too large, cannot support."
|
||||||
"(max: %"PRIu32", need %"PRId64")\n",
|
"(max: %"PRIu32", need %"PRId64")\n",
|
||||||
|
@ -472,8 +494,8 @@ void x86_load_linux(PCMachineState *pcms,
|
||||||
initrd_max = 0x37ffffff;
|
initrd_max = 0x37ffffff;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (initrd_max >= pcms->below_4g_mem_size - pcmc->acpi_data_size) {
|
if (initrd_max >= x86ms->below_4g_mem_size - pcmc->acpi_data_size) {
|
||||||
initrd_max = pcms->below_4g_mem_size - pcmc->acpi_data_size - 1;
|
initrd_max = x86ms->below_4g_mem_size - pcmc->acpi_data_size - 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_ADDR, cmdline_addr);
|
fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_ADDR, cmdline_addr);
|
||||||
|
@ -544,7 +566,7 @@ void x86_load_linux(PCMachineState *pcms,
|
||||||
initrd_filename, gerr->message);
|
initrd_filename, gerr->message);
|
||||||
exit(1);
|
exit(1);
|
||||||
}
|
}
|
||||||
pcms->initrd_mapped_file = mapped_file;
|
x86ms->initrd_mapped_file = mapped_file;
|
||||||
|
|
||||||
initrd_data = g_mapped_file_get_contents(mapped_file);
|
initrd_data = g_mapped_file_get_contents(mapped_file);
|
||||||
initrd_size = g_mapped_file_get_length(mapped_file);
|
initrd_size = g_mapped_file_get_length(mapped_file);
|
||||||
|
@ -688,3 +710,91 @@ void x86_bios_rom_init(MemoryRegion *rom_memory, bool isapc_ram_fw)
|
||||||
(uint32_t)(-bios_size),
|
(uint32_t)(-bios_size),
|
||||||
bios);
|
bios);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static void x86_machine_get_max_ram_below_4g(Object *obj, Visitor *v,
|
||||||
|
const char *name, void *opaque,
|
||||||
|
Error **errp)
|
||||||
|
{
|
||||||
|
X86MachineState *x86ms = X86_MACHINE(obj);
|
||||||
|
uint64_t value = x86ms->max_ram_below_4g;
|
||||||
|
|
||||||
|
visit_type_size(v, name, &value, errp);
|
||||||
|
}
|
||||||
|
|
||||||
|
static void x86_machine_set_max_ram_below_4g(Object *obj, Visitor *v,
|
||||||
|
const char *name, void *opaque,
|
||||||
|
Error **errp)
|
||||||
|
{
|
||||||
|
X86MachineState *x86ms = X86_MACHINE(obj);
|
||||||
|
Error *error = NULL;
|
||||||
|
uint64_t value;
|
||||||
|
|
||||||
|
visit_type_size(v, name, &value, &error);
|
||||||
|
if (error) {
|
||||||
|
error_propagate(errp, error);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
if (value > 4 * GiB) {
|
||||||
|
error_setg(&error,
|
||||||
|
"Machine option 'max-ram-below-4g=%"PRIu64
|
||||||
|
"' expects size less than or equal to 4G", value);
|
||||||
|
error_propagate(errp, error);
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (value < 1 * MiB) {
|
||||||
|
warn_report("Only %" PRIu64 " bytes of RAM below the 4GiB boundary,"
|
||||||
|
"BIOS may not work with less than 1MiB", value);
|
||||||
|
}
|
||||||
|
|
||||||
|
x86ms->max_ram_below_4g = value;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void x86_machine_initfn(Object *obj)
|
||||||
|
{
|
||||||
|
X86MachineState *x86ms = X86_MACHINE(obj);
|
||||||
|
|
||||||
|
x86ms->max_ram_below_4g = 0; /* use default */
|
||||||
|
x86ms->smp_dies = 1;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void x86_machine_class_init(ObjectClass *oc, void *data)
|
||||||
|
{
|
||||||
|
MachineClass *mc = MACHINE_CLASS(oc);
|
||||||
|
X86MachineClass *x86mc = X86_MACHINE_CLASS(oc);
|
||||||
|
NMIClass *nc = NMI_CLASS(oc);
|
||||||
|
|
||||||
|
mc->cpu_index_to_instance_props = x86_cpu_index_to_props;
|
||||||
|
mc->get_default_cpu_node_id = x86_get_default_cpu_node_id;
|
||||||
|
mc->possible_cpu_arch_ids = x86_possible_cpu_arch_ids;
|
||||||
|
x86mc->compat_apic_id_mode = false;
|
||||||
|
nc->nmi_monitor_handler = x86_nmi;
|
||||||
|
|
||||||
|
object_class_property_add(oc, X86_MACHINE_MAX_RAM_BELOW_4G, "size",
|
||||||
|
x86_machine_get_max_ram_below_4g, x86_machine_set_max_ram_below_4g,
|
||||||
|
NULL, NULL, &error_abort);
|
||||||
|
|
||||||
|
object_class_property_set_description(oc, X86_MACHINE_MAX_RAM_BELOW_4G,
|
||||||
|
"Maximum ram below the 4G boundary (32bit boundary)", &error_abort);
|
||||||
|
}
|
||||||
|
|
||||||
|
static const TypeInfo x86_machine_info = {
|
||||||
|
.name = TYPE_X86_MACHINE,
|
||||||
|
.parent = TYPE_MACHINE,
|
||||||
|
.abstract = true,
|
||||||
|
.instance_size = sizeof(X86MachineState),
|
||||||
|
.instance_init = x86_machine_initfn,
|
||||||
|
.class_size = sizeof(X86MachineClass),
|
||||||
|
.class_init = x86_machine_class_init,
|
||||||
|
.interfaces = (InterfaceInfo[]) {
|
||||||
|
{ TYPE_NMI },
|
||||||
|
{ }
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
static void x86_machine_register_types(void)
|
||||||
|
{
|
||||||
|
type_register_static(&x86_machine_info);
|
||||||
|
}
|
||||||
|
|
||||||
|
type_init(x86_machine_register_types)
|
||||||
|
|
|
@ -197,10 +197,12 @@ qemu_irq *xen_interrupt_controller_init(void)
|
||||||
static void xen_ram_init(PCMachineState *pcms,
|
static void xen_ram_init(PCMachineState *pcms,
|
||||||
ram_addr_t ram_size, MemoryRegion **ram_memory_p)
|
ram_addr_t ram_size, MemoryRegion **ram_memory_p)
|
||||||
{
|
{
|
||||||
|
X86MachineState *x86ms = X86_MACHINE(pcms);
|
||||||
MemoryRegion *sysmem = get_system_memory();
|
MemoryRegion *sysmem = get_system_memory();
|
||||||
ram_addr_t block_len;
|
ram_addr_t block_len;
|
||||||
uint64_t user_lowmem = object_property_get_uint(qdev_get_machine(),
|
uint64_t user_lowmem =
|
||||||
PC_MACHINE_MAX_RAM_BELOW_4G,
|
object_property_get_uint(qdev_get_machine(),
|
||||||
|
X86_MACHINE_MAX_RAM_BELOW_4G,
|
||||||
&error_abort);
|
&error_abort);
|
||||||
|
|
||||||
/* Handle the machine opt max-ram-below-4g. It is basically doing
|
/* Handle the machine opt max-ram-below-4g. It is basically doing
|
||||||
|
@ -214,20 +216,20 @@ static void xen_ram_init(PCMachineState *pcms,
|
||||||
}
|
}
|
||||||
|
|
||||||
if (ram_size >= user_lowmem) {
|
if (ram_size >= user_lowmem) {
|
||||||
pcms->above_4g_mem_size = ram_size - user_lowmem;
|
x86ms->above_4g_mem_size = ram_size - user_lowmem;
|
||||||
pcms->below_4g_mem_size = user_lowmem;
|
x86ms->below_4g_mem_size = user_lowmem;
|
||||||
} else {
|
} else {
|
||||||
pcms->above_4g_mem_size = 0;
|
x86ms->above_4g_mem_size = 0;
|
||||||
pcms->below_4g_mem_size = ram_size;
|
x86ms->below_4g_mem_size = ram_size;
|
||||||
}
|
}
|
||||||
if (!pcms->above_4g_mem_size) {
|
if (!x86ms->above_4g_mem_size) {
|
||||||
block_len = ram_size;
|
block_len = ram_size;
|
||||||
} else {
|
} else {
|
||||||
/*
|
/*
|
||||||
* Xen does not allocate the memory continuously, it keeps a
|
* Xen does not allocate the memory continuously, it keeps a
|
||||||
* hole of the size computed above or passed in.
|
* hole of the size computed above or passed in.
|
||||||
*/
|
*/
|
||||||
block_len = (1ULL << 32) + pcms->above_4g_mem_size;
|
block_len = (1ULL << 32) + x86ms->above_4g_mem_size;
|
||||||
}
|
}
|
||||||
memory_region_init_ram(&ram_memory, NULL, "xen.ram", block_len,
|
memory_region_init_ram(&ram_memory, NULL, "xen.ram", block_len,
|
||||||
&error_fatal);
|
&error_fatal);
|
||||||
|
@ -244,12 +246,12 @@ static void xen_ram_init(PCMachineState *pcms,
|
||||||
*/
|
*/
|
||||||
memory_region_init_alias(&ram_lo, NULL, "xen.ram.lo",
|
memory_region_init_alias(&ram_lo, NULL, "xen.ram.lo",
|
||||||
&ram_memory, 0xc0000,
|
&ram_memory, 0xc0000,
|
||||||
pcms->below_4g_mem_size - 0xc0000);
|
x86ms->below_4g_mem_size - 0xc0000);
|
||||||
memory_region_add_subregion(sysmem, 0xc0000, &ram_lo);
|
memory_region_add_subregion(sysmem, 0xc0000, &ram_lo);
|
||||||
if (pcms->above_4g_mem_size > 0) {
|
if (x86ms->above_4g_mem_size > 0) {
|
||||||
memory_region_init_alias(&ram_hi, NULL, "xen.ram.hi",
|
memory_region_init_alias(&ram_hi, NULL, "xen.ram.hi",
|
||||||
&ram_memory, 0x100000000ULL,
|
&ram_memory, 0x100000000ULL,
|
||||||
pcms->above_4g_mem_size);
|
x86ms->above_4g_mem_size);
|
||||||
memory_region_add_subregion(sysmem, 0x100000000ULL, &ram_hi);
|
memory_region_add_subregion(sysmem, 0x100000000ULL, &ram_hi);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -89,7 +89,7 @@ static void ioapic_entry_parse(uint64_t entry, struct ioapic_entry_info *info)
|
||||||
|
|
||||||
static void ioapic_service(IOAPICCommonState *s)
|
static void ioapic_service(IOAPICCommonState *s)
|
||||||
{
|
{
|
||||||
AddressSpace *ioapic_as = PC_MACHINE(qdev_get_machine())->ioapic_as;
|
AddressSpace *ioapic_as = X86_MACHINE(qdev_get_machine())->ioapic_as;
|
||||||
struct ioapic_entry_info info;
|
struct ioapic_entry_info info;
|
||||||
uint8_t i;
|
uint8_t i;
|
||||||
uint32_t mask;
|
uint32_t mask;
|
||||||
|
|
|
@ -8,6 +8,7 @@
|
||||||
#include "hw/block/flash.h"
|
#include "hw/block/flash.h"
|
||||||
#include "net/net.h"
|
#include "net/net.h"
|
||||||
#include "hw/i386/ioapic.h"
|
#include "hw/i386/ioapic.h"
|
||||||
|
#include "hw/i386/x86.h"
|
||||||
|
|
||||||
#include "qemu/range.h"
|
#include "qemu/range.h"
|
||||||
#include "qemu/bitmap.h"
|
#include "qemu/bitmap.h"
|
||||||
|
@ -27,7 +28,7 @@
|
||||||
*/
|
*/
|
||||||
struct PCMachineState {
|
struct PCMachineState {
|
||||||
/*< private >*/
|
/*< private >*/
|
||||||
MachineState parent_obj;
|
X86MachineState parent_obj;
|
||||||
|
|
||||||
/* <public> */
|
/* <public> */
|
||||||
|
|
||||||
|
@ -36,16 +37,11 @@ struct PCMachineState {
|
||||||
|
|
||||||
/* Pointers to devices and objects: */
|
/* Pointers to devices and objects: */
|
||||||
HotplugHandler *acpi_dev;
|
HotplugHandler *acpi_dev;
|
||||||
ISADevice *rtc;
|
|
||||||
PCIBus *bus;
|
PCIBus *bus;
|
||||||
I2CBus *smbus;
|
I2CBus *smbus;
|
||||||
FWCfgState *fw_cfg;
|
|
||||||
qemu_irq *gsi;
|
|
||||||
PFlashCFI01 *flash[2];
|
PFlashCFI01 *flash[2];
|
||||||
GMappedFile *initrd_mapped_file;
|
|
||||||
|
|
||||||
/* Configuration options: */
|
/* Configuration options: */
|
||||||
uint64_t max_ram_below_4g;
|
|
||||||
OnOffAuto vmport;
|
OnOffAuto vmport;
|
||||||
OnOffAuto smm;
|
OnOffAuto smm;
|
||||||
|
|
||||||
|
@ -54,30 +50,16 @@ struct PCMachineState {
|
||||||
bool sata_enabled;
|
bool sata_enabled;
|
||||||
bool pit_enabled;
|
bool pit_enabled;
|
||||||
|
|
||||||
/* RAM information (sizes, addresses, configuration): */
|
|
||||||
ram_addr_t below_4g_mem_size, above_4g_mem_size;
|
|
||||||
|
|
||||||
/* CPU and apic information: */
|
|
||||||
bool apic_xrupt_override;
|
|
||||||
unsigned apic_id_limit;
|
|
||||||
uint16_t boot_cpus;
|
|
||||||
unsigned smp_dies;
|
|
||||||
|
|
||||||
/* NUMA information: */
|
/* NUMA information: */
|
||||||
uint64_t numa_nodes;
|
uint64_t numa_nodes;
|
||||||
uint64_t *node_mem;
|
uint64_t *node_mem;
|
||||||
|
|
||||||
/* Address space used by IOAPIC device. All IOAPIC interrupts
|
|
||||||
* will be translated to MSI messages in the address space. */
|
|
||||||
AddressSpace *ioapic_as;
|
|
||||||
|
|
||||||
/* ACPI Memory hotplug IO base address */
|
/* ACPI Memory hotplug IO base address */
|
||||||
hwaddr memhp_io_base;
|
hwaddr memhp_io_base;
|
||||||
};
|
};
|
||||||
|
|
||||||
#define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
|
#define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
|
||||||
#define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size"
|
#define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size"
|
||||||
#define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
|
|
||||||
#define PC_MACHINE_VMPORT "vmport"
|
#define PC_MACHINE_VMPORT "vmport"
|
||||||
#define PC_MACHINE_SMM "smm"
|
#define PC_MACHINE_SMM "smm"
|
||||||
#define PC_MACHINE_SMBUS "smbus"
|
#define PC_MACHINE_SMBUS "smbus"
|
||||||
|
@ -102,7 +84,7 @@ struct PCMachineState {
|
||||||
*/
|
*/
|
||||||
typedef struct PCMachineClass {
|
typedef struct PCMachineClass {
|
||||||
/*< private >*/
|
/*< private >*/
|
||||||
MachineClass parent_class;
|
X86MachineClass parent_class;
|
||||||
|
|
||||||
/*< public >*/
|
/*< public >*/
|
||||||
|
|
||||||
|
@ -144,9 +126,6 @@ typedef struct PCMachineClass {
|
||||||
|
|
||||||
/* use PVH to load kernels that support this feature */
|
/* use PVH to load kernels that support this feature */
|
||||||
bool pvh_enabled;
|
bool pvh_enabled;
|
||||||
|
|
||||||
/* Enables contiguous-apic-ID mode */
|
|
||||||
bool compat_apic_id_mode;
|
|
||||||
} PCMachineClass;
|
} PCMachineClass;
|
||||||
|
|
||||||
#define TYPE_PC_MACHINE "generic-pc-machine"
|
#define TYPE_PC_MACHINE "generic-pc-machine"
|
||||||
|
|
|
@ -17,7 +17,63 @@
|
||||||
#ifndef HW_I386_X86_H
|
#ifndef HW_I386_X86_H
|
||||||
#define HW_I386_X86_H
|
#define HW_I386_X86_H
|
||||||
|
|
||||||
|
#include "qemu-common.h"
|
||||||
|
#include "exec/hwaddr.h"
|
||||||
|
#include "qemu/notify.h"
|
||||||
|
|
||||||
#include "hw/boards.h"
|
#include "hw/boards.h"
|
||||||
|
#include "hw/nmi.h"
|
||||||
|
|
||||||
|
typedef struct {
|
||||||
|
/*< private >*/
|
||||||
|
MachineClass parent;
|
||||||
|
|
||||||
|
/*< public >*/
|
||||||
|
|
||||||
|
/* Enables contiguous-apic-ID mode */
|
||||||
|
bool compat_apic_id_mode;
|
||||||
|
} X86MachineClass;
|
||||||
|
|
||||||
|
typedef struct {
|
||||||
|
/*< private >*/
|
||||||
|
MachineState parent;
|
||||||
|
|
||||||
|
/*< public >*/
|
||||||
|
|
||||||
|
/* Pointers to devices and objects: */
|
||||||
|
ISADevice *rtc;
|
||||||
|
FWCfgState *fw_cfg;
|
||||||
|
qemu_irq *gsi;
|
||||||
|
GMappedFile *initrd_mapped_file;
|
||||||
|
|
||||||
|
/* Configuration options: */
|
||||||
|
uint64_t max_ram_below_4g;
|
||||||
|
|
||||||
|
/* RAM information (sizes, addresses, configuration): */
|
||||||
|
ram_addr_t below_4g_mem_size, above_4g_mem_size;
|
||||||
|
|
||||||
|
/* CPU and apic information: */
|
||||||
|
bool apic_xrupt_override;
|
||||||
|
unsigned apic_id_limit;
|
||||||
|
uint16_t boot_cpus;
|
||||||
|
unsigned smp_dies;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Address space used by IOAPIC device. All IOAPIC interrupts
|
||||||
|
* will be translated to MSI messages in the address space.
|
||||||
|
*/
|
||||||
|
AddressSpace *ioapic_as;
|
||||||
|
} X86MachineState;
|
||||||
|
|
||||||
|
#define X86_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
|
||||||
|
|
||||||
|
#define TYPE_X86_MACHINE MACHINE_TYPE_NAME("x86")
|
||||||
|
#define X86_MACHINE(obj) \
|
||||||
|
OBJECT_CHECK(X86MachineState, (obj), TYPE_X86_MACHINE)
|
||||||
|
#define X86_MACHINE_GET_CLASS(obj) \
|
||||||
|
OBJECT_GET_CLASS(X86MachineClass, obj, TYPE_X86_MACHINE)
|
||||||
|
#define X86_MACHINE_CLASS(class) \
|
||||||
|
OBJECT_CLASS_CHECK(X86MachineClass, class, TYPE_X86_MACHINE)
|
||||||
|
|
||||||
uint32_t x86_cpu_apic_id_from_index(PCMachineState *pcms,
|
uint32_t x86_cpu_apic_id_from_index(PCMachineState *pcms,
|
||||||
unsigned int cpu_index);
|
unsigned int cpu_index);
|
||||||
|
@ -30,6 +86,6 @@ const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms);
|
||||||
|
|
||||||
void x86_bios_rom_init(MemoryRegion *rom_memory, bool isapc_ram_fw);
|
void x86_bios_rom_init(MemoryRegion *rom_memory, bool isapc_ram_fw);
|
||||||
|
|
||||||
void x86_load_linux(PCMachineState *x86ms, FWCfgState *fw_cfg);
|
void x86_load_linux(PCMachineState *pcms, FWCfgState *fw_cfg);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
Loading…
Reference in a new issue