Cadence: gem: fix wraparound in 64bit descriptors
Wraparound of TX descriptor cyclic buffer only updated the low 32 bits of the descriptor. Fix that by checking if we're working with 64bit descriptors. Signed-off-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20200417171736.441607-1-rfried.dev@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -1238,7 +1238,14 @@ static void gem_transmit(CadenceGEMState *s)
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/* read next descriptor */
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if (tx_desc_get_wrap(desc)) {
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tx_desc_set_last(desc);
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packet_desc_addr = s->regs[GEM_TXQBASE];
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if (s->regs[GEM_DMACFG] & GEM_DMACFG_ADDR_64B) {
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packet_desc_addr = s->regs[GEM_TBQPH];
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packet_desc_addr <<= 32;
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} else {
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packet_desc_addr = 0;
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}
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packet_desc_addr |= s->regs[GEM_TXQBASE];
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} else {
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packet_desc_addr += 4 * gem_get_desc_len(s, false);
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}
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