From 80ae416058d8941824f450343781183618555415 Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Thu, 22 Nov 2012 13:31:03 -0200 Subject: [PATCH 1/2] target-i386/cpu: Add missing flags to Haswell CPU model MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When adding the Haswell CPU model, I intended to make it a superset of the features present on the SandyBridge model, but I have removed the SEP and RDTSCP features from the feature list by mistake. This patch adds the missing SEP and RDTSCP features (that are present on SandyBridge) to Haswell. Reported-by: Martin Kletzander Signed-off-by: Eduardo Habkost Signed-off-by: Andreas Färber --- target-i386/cpu.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 64c34910a0..4fdd4f72d2 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -657,7 +657,7 @@ static x86_def_t builtin_x86_defs[] = { .stepping = 1, .features = CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA | - CPUID_PGE | CPUID_MTRR | CPUID_APIC | CPUID_CX8 | + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 | CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | CPUID_DE | CPUID_FP87, .ext_features = CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES | @@ -666,7 +666,8 @@ static x86_def_t builtin_x86_defs[] = { CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 | CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE | CPUID_EXT_PCID, - .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_NX | CPUID_EXT2_SYSCALL, + .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX | + CPUID_EXT2_SYSCALL, .ext3_features = CPUID_EXT3_LAHF_LM, .cpuid_7_0_ebx_features = CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | From a0a7068104cc9908d0875404b0fa2ebf46e40f97 Mon Sep 17 00:00:00 2001 From: Aurelien Jarno Date: Sat, 24 Nov 2012 15:07:01 +0100 Subject: [PATCH 2/2] target-i386: Enable SSSE3 TCG support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit SSSE3 support has been added to TCG more than 4 years ago in commit 4242b1bd8acc19aaaacffdaad4ac23213d72a72b. It has been disabled by mistake in commit 551a2dec8fa55006a68393b9d6fb63577d2b3f1c. Signed-off-by: Aurelien Jarno Signed-off-by: Andreas Färber --- target-i386/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 4fdd4f72d2..c6c2ca03a1 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -315,7 +315,7 @@ typedef struct x86_def_t { /* missing: CPUID_VME, CPUID_DTS, CPUID_SS, CPUID_HT, CPUID_TM, CPUID_PBE */ #define TCG_EXT_FEATURES (CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | \ - CPUID_EXT_CX16 | CPUID_EXT_POPCNT | \ + CPUID_EXT_SSSE3 | CPUID_EXT_CX16 | CPUID_EXT_POPCNT | \ CPUID_EXT_HYPERVISOR) /* missing: CPUID_EXT_DTES64, CPUID_EXT_DSCPL, CPUID_EXT_VMX, CPUID_EXT_EST,