Fix OMAP GPMC register offsets and SYSCTL 8bit io (Kyungmin Park).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4943 c046a42c-6fe2-441c-8c8c-71466251a162
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c19148bd8f
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hw/omap2.c
57
hw/omap2.c
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@ -3528,6 +3528,32 @@ struct omap_sysctl_s {
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uint32_t msuspendmux[5];
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uint32_t msuspendmux[5];
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};
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};
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static uint32_t omap_sysctl_read8(void *opaque, target_phys_addr_t addr)
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{
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struct omap_sysctl_s *s = (struct omap_sysctl_s *) opaque;
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int offset = addr - s->base;
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int pad_offset, byte_offset;
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int value;
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switch (offset) {
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case 0x030 ... 0x140: /* CONTROL_PADCONF - only used in the POP */
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pad_offset = (offset - 0x30) >> 2;
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byte_offset = (offset - 0x30) & (4 - 1);
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value = s->padconf[pad_offset];
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value = (value >> (byte_offset * 8)) & 0xff;
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return value;
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default:
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break;
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}
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OMAP_BAD_REG(addr);
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return 0;
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}
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static uint32_t omap_sysctl_read(void *opaque, target_phys_addr_t addr)
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static uint32_t omap_sysctl_read(void *opaque, target_phys_addr_t addr)
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{
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{
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struct omap_sysctl_s *s = (struct omap_sysctl_s *) opaque;
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struct omap_sysctl_s *s = (struct omap_sysctl_s *) opaque;
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@ -3629,6 +3655,31 @@ static uint32_t omap_sysctl_read(void *opaque, target_phys_addr_t addr)
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return 0;
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return 0;
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}
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}
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static void omap_sysctl_write8(void *opaque, target_phys_addr_t addr,
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uint32_t value)
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{
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struct omap_sysctl_s *s = (struct omap_sysctl_s *) opaque;
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int offset = addr - s->base;
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int pad_offset, byte_offset;
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int prev_value;
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switch (offset) {
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case 0x030 ... 0x140: /* CONTROL_PADCONF - only used in the POP */
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pad_offset = (offset - 0x30) >> 2;
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byte_offset = (offset - 0x30) & (4 - 1);
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prev_value = s->padconf[pad_offset];
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prev_value &= ~(0xff << (byte_offset * 8));
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prev_value |= ((value & 0x1f1f1f1f) << (byte_offset * 8)) & 0x1f1f1f1f;
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s->padconf[pad_offset] = prev_value;
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break;
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default:
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OMAP_BAD_REG(addr);
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break;
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}
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}
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static void omap_sysctl_write(void *opaque, target_phys_addr_t addr,
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static void omap_sysctl_write(void *opaque, target_phys_addr_t addr,
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uint32_t value)
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uint32_t value)
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{
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{
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@ -3726,13 +3777,13 @@ static void omap_sysctl_write(void *opaque, target_phys_addr_t addr,
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}
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}
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static CPUReadMemoryFunc *omap_sysctl_readfn[] = {
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static CPUReadMemoryFunc *omap_sysctl_readfn[] = {
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omap_badwidth_read32, /* TODO */
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omap_sysctl_read8,
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omap_badwidth_read32, /* TODO */
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omap_badwidth_read32, /* TODO */
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omap_sysctl_read,
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omap_sysctl_read,
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};
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};
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static CPUWriteMemoryFunc *omap_sysctl_writefn[] = {
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static CPUWriteMemoryFunc *omap_sysctl_writefn[] = {
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omap_badwidth_write32, /* TODO */
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omap_sysctl_write8,
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omap_badwidth_write32, /* TODO */
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omap_badwidth_write32, /* TODO */
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omap_sysctl_write,
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omap_sysctl_write,
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};
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};
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@ -4139,7 +4190,7 @@ static uint32_t omap_gpmc_read(void *opaque, target_phys_addr_t addr)
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cs = (offset - 0x060) / 0x30;
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cs = (offset - 0x060) / 0x30;
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offset -= cs * 0x30;
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offset -= cs * 0x30;
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f = s->cs_file + cs;
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f = s->cs_file + cs;
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switch (offset - cs * 0x30) {
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switch (offset) {
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case 0x60: /* GPMC_CONFIG1 */
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case 0x60: /* GPMC_CONFIG1 */
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return f->config[0];
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return f->config[0];
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case 0x64: /* GPMC_CONFIG2 */
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case 0x64: /* GPMC_CONFIG2 */
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