intc/arm_gic: Support IRQ injection for more than 256 vpus
Host kernels that expose the KVM_CAP_ARM_IRQ_LINE_LAYOUT_2 capability allow injection of interrupts along with vcpu ids larger than 255. Let's encode the vpcu id on 12 bits according to the upgraded KVM_IRQ_LINE ABI when needed. Given that we have two callsites that need to assemble the value for kvm_set_irq(), a new helper routine, kvm_arm_set_irq is introduced. Without that patch qemu exits with "kvm_set_irq: Invalid argument" message. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reported-by: Zenghui Yu <yuzenghui@huawei.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Acked-by: Marc Zyngier <maz@kernel.org> Message-id: 20191003154640.22451-3-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -55,7 +55,7 @@ void kvm_arm_gic_set_irq(uint32_t num_irq, int irq, int level)
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* has separate fields in the irq number for type,
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* CPU number and interrupt number.
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*/
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int kvm_irq, irqtype, cpu;
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int irqtype, cpu;
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if (irq < (num_irq - GIC_INTERNAL)) {
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/* External interrupt. The kernel numbers these like the GIC
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@ -72,10 +72,7 @@ void kvm_arm_gic_set_irq(uint32_t num_irq, int irq, int level)
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cpu = irq / GIC_INTERNAL;
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irq %= GIC_INTERNAL;
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}
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kvm_irq = (irqtype << KVM_ARM_IRQ_TYPE_SHIFT)
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| (cpu << KVM_ARM_IRQ_VCPU_SHIFT) | irq;
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kvm_set_irq(kvm_state, kvm_irq, !!level);
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kvm_arm_set_irq(cpu, irqtype, irq, !!level);
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}
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static void kvm_arm_gicv2_set_irq(void *opaque, int irq, int level)
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@ -576,16 +576,16 @@ static void arm_cpu_kvm_set_irq(void *opaque, int irq, int level)
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ARMCPU *cpu = opaque;
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CPUARMState *env = &cpu->env;
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CPUState *cs = CPU(cpu);
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int kvm_irq = KVM_ARM_IRQ_TYPE_CPU << KVM_ARM_IRQ_TYPE_SHIFT;
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uint32_t linestate_bit;
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int irq_id;
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switch (irq) {
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case ARM_CPU_IRQ:
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kvm_irq |= KVM_ARM_IRQ_CPU_IRQ;
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irq_id = KVM_ARM_IRQ_CPU_IRQ;
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linestate_bit = CPU_INTERRUPT_HARD;
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break;
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case ARM_CPU_FIQ:
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kvm_irq |= KVM_ARM_IRQ_CPU_FIQ;
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irq_id = KVM_ARM_IRQ_CPU_FIQ;
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linestate_bit = CPU_INTERRUPT_FIQ;
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break;
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default:
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@ -597,9 +597,7 @@ static void arm_cpu_kvm_set_irq(void *opaque, int irq, int level)
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} else {
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env->irq_line_state &= ~linestate_bit;
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}
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kvm_irq |= cs->cpu_index << KVM_ARM_IRQ_VCPU_SHIFT;
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kvm_set_irq(kvm_state, kvm_irq, level ? 1 : 0);
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kvm_arm_set_irq(cs->cpu_index, KVM_ARM_IRQ_TYPE_CPU, irq_id, !!level);
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#endif
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}
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@ -744,6 +744,18 @@ int kvm_arm_vgic_probe(void)
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}
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}
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int kvm_arm_set_irq(int cpu, int irqtype, int irq, int level)
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{
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int kvm_irq = (irqtype << KVM_ARM_IRQ_TYPE_SHIFT) | irq;
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int cpu_idx1 = cpu % 256;
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int cpu_idx2 = cpu / 256;
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kvm_irq |= (cpu_idx1 << KVM_ARM_IRQ_VCPU_SHIFT) |
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(cpu_idx2 << KVM_ARM_IRQ_VCPU2_SHIFT);
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return kvm_set_irq(kvm_state, kvm_irq, !!level);
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}
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int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
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uint64_t address, uint32_t data, PCIDevice *dev)
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{
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@ -253,6 +253,7 @@ int kvm_arm_vgic_probe(void);
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void kvm_arm_pmu_set_irq(CPUState *cs, int irq);
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void kvm_arm_pmu_init(CPUState *cs);
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int kvm_arm_set_irq(int cpu, int irqtype, int irq, int level);
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#else
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