target/xtensa: Make sure that tb->size != 0
tb_gen_code() assumes that tb->size must never be zero, otherwise it may produce spurious exceptions. For xtensa this may happen when decoding an unknown instruction, when handling a write into the CCOUNT or CCOMPARE special register and when single-stepping the first instruction of an exception handler. Fix by pretending that the size of the respective translation block is 1 in all these cases. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Tested-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Message-Id: <20210416154939.32404-4-iii@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
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@ -917,6 +917,7 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc)
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"unknown instruction length (pc = %08x)\n",
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"unknown instruction length (pc = %08x)\n",
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dc->pc);
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dc->pc);
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gen_exception_cause(dc, ILLEGAL_INSTRUCTION_CAUSE);
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gen_exception_cause(dc, ILLEGAL_INSTRUCTION_CAUSE);
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dc->base.pc_next = dc->pc + 1;
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return;
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return;
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}
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}
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@ -1274,11 +1275,13 @@ static void xtensa_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
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if ((tb_cflags(dc->base.tb) & CF_USE_ICOUNT)
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if ((tb_cflags(dc->base.tb) & CF_USE_ICOUNT)
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&& (dc->base.tb->flags & XTENSA_TBFLAG_YIELD)) {
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&& (dc->base.tb->flags & XTENSA_TBFLAG_YIELD)) {
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gen_exception(dc, EXCP_YIELD);
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gen_exception(dc, EXCP_YIELD);
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dc->base.pc_next = dc->pc + 1;
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dc->base.is_jmp = DISAS_NORETURN;
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dc->base.is_jmp = DISAS_NORETURN;
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return;
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return;
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}
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}
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if (dc->base.tb->flags & XTENSA_TBFLAG_EXCEPTION) {
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if (dc->base.tb->flags & XTENSA_TBFLAG_EXCEPTION) {
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gen_exception(dc, EXCP_DEBUG);
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gen_exception(dc, EXCP_DEBUG);
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dc->base.pc_next = dc->pc + 1;
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dc->base.is_jmp = DISAS_NORETURN;
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dc->base.is_jmp = DISAS_NORETURN;
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return;
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return;
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}
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}
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