target/mips: Implement CP0 Config1.WR bit functionality
Add testing Config1.WR bit into watch exception handling logic. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
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@ -5521,6 +5521,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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case 5:
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case 6:
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case 7:
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CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR));
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gen_helper_1e0i(mfc0_watchlo, arg, sel);
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rn = "WatchLo";
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break;
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@ -5538,6 +5539,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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case 5:
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case 6:
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case 7:
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CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR));
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gen_helper_1e0i(mfc0_watchhi, arg, sel);
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rn = "WatchHi";
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break;
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@ -6220,6 +6222,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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case 5:
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case 6:
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case 7:
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CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR));
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gen_helper_0e1i(mtc0_watchlo, arg, sel);
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rn = "WatchLo";
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break;
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@ -6237,6 +6240,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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case 5:
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case 6:
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case 7:
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CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR));
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gen_helper_0e1i(mtc0_watchhi, arg, sel);
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rn = "WatchHi";
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break;
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@ -6923,6 +6927,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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case 5:
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case 6:
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case 7:
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CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR));
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gen_helper_1e0i(dmfc0_watchlo, arg, sel);
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rn = "WatchLo";
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break;
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@ -6940,6 +6945,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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case 5:
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case 6:
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case 7:
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CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR));
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gen_helper_1e0i(mfc0_watchhi, arg, sel);
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rn = "WatchHi";
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break;
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@ -7604,6 +7610,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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case 5:
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case 6:
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case 7:
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CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR));
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gen_helper_0e1i(mtc0_watchlo, arg, sel);
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rn = "WatchLo";
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break;
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@ -7621,6 +7628,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
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case 5:
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case 6:
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case 7:
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CP0_CHECK(ctx->CP0_Config1 & (1 << CP0C1_WR));
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gen_helper_0e1i(mtc0_watchhi, arg, sel);
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rn = "WatchHi";
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break;
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