target-mips: Always evaluate debugging macro arguments

this will prevent some of the compilation errors with debugging
enabled from creeping back in.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Richard Henderson 2012-09-18 21:55:34 -07:00 committed by Aurelien Jarno
parent 9fa7748873
commit fb7729e2d0

View file

@ -28,7 +28,7 @@
#define GEN_HELPER 1 #define GEN_HELPER 1
#include "helper.h" #include "helper.h"
//#define MIPS_DEBUG_DISAS #define MIPS_DEBUG_DISAS 0
//#define MIPS_DEBUG_SIGN_EXTENSIONS //#define MIPS_DEBUG_SIGN_EXTENSIONS
/* MIPS major opcodes */ /* MIPS major opcodes */
@ -566,22 +566,25 @@ static const char *fregnames[] =
"f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
"f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", }; "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", };
#ifdef MIPS_DEBUG_DISAS #define MIPS_DEBUG(fmt, ...) \
#define MIPS_DEBUG(fmt, ...) \ do { \
qemu_log_mask(CPU_LOG_TB_IN_ASM, \ if (MIPS_DEBUG_DISAS) { \
TARGET_FMT_lx ": %08x " fmt "\n", \ qemu_log_mask(CPU_LOG_TB_IN_ASM, \
ctx->pc, ctx->opcode , ## __VA_ARGS__) TARGET_FMT_lx ": %08x " fmt "\n", \
#define LOG_DISAS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__) ctx->pc, ctx->opcode , ## __VA_ARGS__); \
#else } \
#define MIPS_DEBUG(fmt, ...) do { } while(0) } while (0)
#define LOG_DISAS(...) do { } while (0)
#endif #define LOG_DISAS(...) \
do { \
if (MIPS_DEBUG_DISAS) { \
qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__); \
} \
} while (0)
#define MIPS_INVAL(op) \ #define MIPS_INVAL(op) \
do { \
MIPS_DEBUG("Invalid %s %03x %03x %03x", op, ctx->opcode >> 26, \ MIPS_DEBUG("Invalid %s %03x %03x %03x", op, ctx->opcode >> 26, \
ctx->opcode & 0x3F, ((ctx->opcode >> 16) & 0x1F)); \ ctx->opcode & 0x3F, ((ctx->opcode >> 16) & 0x1F))
} while (0)
/* General purpose registers moves. */ /* General purpose registers moves. */
static inline void gen_load_gpr (TCGv t, int reg) static inline void gen_load_gpr (TCGv t, int reg)