haraldwolff/qemu-patch-raspberry4
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Author SHA1 Message Date
Peter Maydell 5149e557d7 Open 2.1 development tree 
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2014-04-17 20:39:32 +01:00
Richard Henderson 06ef8604e9 target-alpha: Remove cpu_unique, cpu_sysval, cpu_usp 
Technically, these variables could have been referenced both via
offsets from env and as TCG registers, which would be illegal.
Of course, that could only be done from PALcode, and ours doesn't
do that.

But honestly, these are used infrequently enough that they don't
really need to be TCG registers.  We wind up with exactly the same
code if we follow the letter of the law and issue explicit ld/st.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:42 -07:00
Richard Henderson 39acc64741 target-alpha: Tidy alpha_translate_init 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:42 -07:00
Richard Henderson e566be049a target-alpha: Don't issue goto_tb under singlestep 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:42 -07:00
Richard Henderson 8f811b9a4a target-alpha: Use non-local temps for zero/sink 
These values are no longer live across branches.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:42 -07:00
Richard Henderson a9e05a1ceb target-alpha: Use extract to get insn fields 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:42 -07:00
Richard Henderson 0e154fe92c target-alpha: Convert mfpr/mtpr to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:42 -07:00
Richard Henderson ef3765cb95 target-alpha: Convert gen_cpys et al to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:42 -07:00
Richard Henderson e8d8fef48f target-alpha: Convert gen_fcvtlq/ql to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:42 -07:00
Richard Henderson 6580935246 target-alpha: Convert gen_fcmov to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:42 -07:00
Richard Henderson 76bff4f82f target-alpha: Convert gen_bcond to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:42 -07:00
Richard Henderson e20b8c04a3 target-alpha: Convert most ieee insns to source/sink 
This one fixes a bug, previously noted as supressing exceptions
in the (unlikely) case the destination register was $f31.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:42 -07:00
Richard Henderson 8b0190bbde target-alpha: Convert gen_ieee_input to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:42 -07:00
Richard Henderson f477ed3c11 target-alpha: Convert MVIOP2 to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:42 -07:00
Richard Henderson cd2754addc target-alpha: Convert ARITH3 to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:42 -07:00
Richard Henderson 3d045dbca5 target-alpha: Convert FARITH3 to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:42 -07:00
Richard Henderson baee04abba target-alpha: Convert FARITH2 to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:42 -07:00
Richard Henderson b144be9e06 target-alpha: Convert gen_zap/not to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:42 -07:00
Richard Henderson 5e5863ecf1 target-alpha: Convert gen_ins_h/l to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:42 -07:00
Richard Henderson 9a734d64f9 target-alpha: Convert gen_ext_h/l to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:42 -07:00
Richard Henderson 9a8fa1bdad target-alpha: Convert gen_msk_h/l to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:41 -07:00
Richard Henderson 83ebb7cd01 target-alpha: Convert gen_cmov to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:41 -07:00
Richard Henderson 42774a56ec target-alpha: Convert ARITH3_EX to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:41 -07:00
Richard Henderson 958683482c target-alpha: Convert gen_cmp to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:41 -07:00
Richard Henderson cd2d46fd21 target-alpha: Convert gen_store_conditional to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:41 -07:00
Richard Henderson 595b8fdd54 target-alpha: Convert gen_load/store_mem to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:41 -07:00
Richard Henderson a4af30447b target-alpha: Convert opcode 0x1F to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:41 -07:00
Richard Henderson 46010969f3 target-alpha: Convert opcode 0x1E to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:41 -07:00
Richard Henderson c67b67e511 target-alpha: Convert opcode 0x1C to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:41 -07:00
Richard Henderson 1eaa1da7e4 target-alpha: Convert opcode 0x1B to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:41 -07:00
Richard Henderson 8f56ced8aa target-alpha: Convert opcode 0x1A to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:41 -07:00
Richard Henderson 89fe090bb3 target-alpha: Convert opcode 0x18 to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:41 -07:00
Richard Henderson 6b88b37c0e target-alpha: Convert opcode 0x17 to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:41 -07:00
Richard Henderson 075b8ddb9b target-alpha: Convert opcode 0x14 to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:41 -07:00
Richard Henderson de4d3555fa target-alpha: Convert opcode 0x13 to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:41 -07:00
Richard Henderson 3bd67b7dab target-alpha: Convert opcode 0x12 to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:41 -07:00
Richard Henderson db4a16458c target-alpha: Convert opcode 0x11 to source/sink 
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:41 -07:00
Richard Henderson 194cfb43d5 target-alpha: Introduce functions for source/sink 
This will allow cleaner handling of $31 and $f31.
Convert opcodes 0x08, 0x09, 0x10 as examples.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:40 -07:00
Richard Henderson 64f45e4991 target-alpha: Introduce REQUIRE_REG_31 
We were missing quite a few checks for Ra or Rb required to be 31.
Further, the one place we did check we also checked for no literal
operand and the Handbook says nothing about that.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:40 -07:00
Richard Henderson 5238c88657 target-alpha: Introduce REQUIRE_TB_FLAG 
The methods by which we check for cpu features varied wildly
across the function.  Using a nice macro cleans this up.

Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:40 -07:00
Paolo Bonzini 67debe3ae5 target-alpha: fix the braces 
Conform to coding style, and avoid further occurrences of bugs due to
misplaced braces.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-17 11:47:40 -07:00
Peter Maydell a9e8aeb375 Update version for v2.0.0 release 
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
 2014-04-17 13:41:45 +01:00
Richard Henderson b825025f08 tcg-aarch64: Use tcg_out_mov in preference to tcg_out_movr 
It's the more canonical interface.

Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-16 12:13:02 -04:00
Richard Henderson a056c9faa4 tcg-aarch64: Prefer unsigned offsets before signed offsets for ldst 
The assembler seems to prefer them, perhaps we should too.

Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-16 12:13:01 -04:00
Richard Henderson 3d4299f425 tcg-aarch64: Introduce tcg_out_insn_3312, _3310, _3313 
Replace aarch64_ldst_op_data with AArch64LdstType, as it wasn't encoded
for the proper shift for the field and was confusing.

Merge aarch64_ldst_op_data, AArch64LdstType, and a few stray opcode bits
into a single I3312_* argument, eliminating some magic numbers from the
helper functions.

Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-16 12:13:01 -04:00
Richard Henderson dc73dfd4bc tcg-aarch64: Merge aarch64_ldst_get_data/type into tcg_out_op 
Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-16 12:13:01 -04:00
Richard Henderson edd8824cd4 tcg-aarch64: Introduce tcg_out_insn_3507 
Cleaning up the implementation of REV and REV16 at the same time.

Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-16 12:13:01 -04:00
Richard Henderson e81864a109 tcg-aarch64: Support stores of zero 
Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-16 12:13:01 -04:00
Richard Henderson de61d14fa7 tcg-aarch64: Implement TCG_TARGET_HAS_new_ldst 
Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-16 12:13:01 -04:00
Richard Henderson 667b1cdd4e tcg-aarch64: Pass qemu_ld/st arguments directly 
Instead of passing them the "args" array.

Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
 2014-04-16 12:13:00 -04:00