Commit graph

9462 commits

Author SHA1 Message Date
Stefan Weil 5fa9a0ae49 eepro100: Restructure code
This patch only moves about 150 lines of code from
function eepro100_cu_command to a new function action_command.

A goto statement was replaced by a for loop.

There are no functional changes. Nor did I change comments
starting with // (they will be removed by future patches).

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-27 12:28:34 -05:00
Aurelien Jarno f669df275c target-arm: use native tcg-ops for ror/bic/vorn
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-27 09:46:27 +01:00
Juha Riihimäki 50f67e95e2 target-arm: fix neon shift helper functions
Current code is broken at least on recent compilers, comparison
between signed and unsigned types yield incorrect code and render
the neon shift helper functions defunct. This is the third revision
of this patch, casting all comparisons with the sizeof operator to
signed ssize_t type to force comparisons to be between signed integral
types.

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-27 09:46:26 +01:00
Juha Riihimäki ca9a32e4f3 target-arm: fix neon vsri, vshl and vsli ops
Shift by immediate value is incorrectly overwritten by a temporary
variable in the processing of NEON vsri, vshl and vsli instructions.
This patch has been revised to also include a fix for the special
case where the code would previously try to shift an integer value
over 31 bits left/right.

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-27 09:46:26 +01:00
Juha Riihimäki 71b3c3dea2 target-arm: allow modifying vfp fpexc en bit only
All other bits except for the EN in the VFP FPEXC register are defined
as subarchitecture specific and real functionality for any of the
other bits has not been implemented in QEMU. However, current code
allows modifying all bits in the VFP FPEXC register leading to
problems when guest code is writing 1's to the subarchitecture
specific bits and checking whether the bits stay up to verify the
existence of functionality which in fact does not exist in QEMU.
This patch has been revised to include the same behavior change in
the gdb register write function.

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-27 09:46:26 +01:00
Juha Riihimäki 8449623376 target-arm: add support for neon vld1.64/vst1.64 instructions
Add support for NEON vld1.64 and vst1.64 instructions. This patch is
revised to follow more closely the specification and raises
undefined exception if 64bit element size is used for vld2/vst2 or
vld4/vst4 instructions.

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-27 09:46:26 +01:00
Juha Riihimäki 2301db4916 target-arm: fix neon vshrn/vrshrn ops
In the existing code shift value is clobbered during the pass loop.
This patch changes the code so that it stores the intermediate
result in the target neon register directly and eliminates the need
to use a temporary to hold the intermediate value thus leaving the
shift value in the temporary variable intact. This is a new patch
in this version of the patch series.

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-27 09:46:26 +01:00
Juha Riihimäki 25aeb69b8d target-arm: fix incorrect temporary variable freeing
tmp4 and tmp5 temporary variables are allocated using tcg_const_i32
but incorrectly released using dead_tmp which will cause resource
leak tracking to report false leaks.

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Acked-by:  Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-26 20:36:47 +01:00
Blue Swirl f79ca11027 sparc32: tcx: remove unused include directive
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-25 15:04:43 +00:00
Blue Swirl b280fcdfde sparc32: convert sbi to VMState, vmsd and vmstate reset
Also remove unused include directive.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-24 20:08:43 +00:00
Blue Swirl 9a2070d3c0 sparc32: convert Sun4c interrupt controller to reset + vmsd
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-24 19:49:15 +00:00
Blue Swirl 78971d57bb sparc32: convert interrupt controller to reset + vmsd
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-24 19:44:37 +00:00
Blue Swirl 1a522e8a67 sparc32: convert IOMMU to reset + vmsd
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-24 19:39:17 +00:00
Blue Swirl 49ef6c9055 sparc32: convert DMA controller to reset + vmsd, fix reset on init
Add a missing call to reset on device init.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-24 19:35:32 +00:00
Blue Swirl 285e468d64 m48t59: convert to vmstate reset
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-24 19:22:56 +00:00
Blue Swirl 0e0bfeea68 sparc32: convert slavio_timer to reset + vmsd
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-24 17:35:13 +00:00
Blue Swirl 2be3783328 fdc: convert to reset + vmsd
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-24 16:56:20 +00:00
Blue Swirl 63235df8a1 esp: convert to reset + vmsd
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-24 16:34:21 +00:00
Blue Swirl 82d4c6e683 sparc32: convert cs4231 to VMState, vmsd and reset
Also remove unused include directive.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-24 16:20:32 +00:00
Blue Swirl 09330e90fe escc: add chipset docs
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-24 16:09:01 +00:00
Blue Swirl bdb78cae61 escc: convert to VMState, vmsd and reset
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-24 16:07:10 +00:00
Blue Swirl 5ac574c4d3 sparc32: add chipset docs for eccmemctl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-24 15:27:28 +00:00
Blue Swirl 1795057a8f sparc32: convert slavio_misc to reset + vmsd
Also remove unused include directive.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-24 15:27:23 +00:00
Blue Swirl 0284dc5410 sparc32: convert eccmemctl to reset + vmsd
Also remove unused include directive.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-24 14:14:39 +00:00
Blue Swirl 1c6a50e71c sparc64: remove unused variables
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-24 09:15:22 +00:00
Juha.Riihimaki@nokia.com 7b2919a0b4 target-arm: optimize thumb 32-bit multiply
Current implementation of thumb mul instruction is implemented as a
32x32->64 multiply which then uses only 32 least significant bits of
the result. Replace that with a simple 32x32->32 multiply.

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-23 17:22:13 +02:00
Juha Riihimäki b75263d653 target-arm: cleanup internal resource leaks
Revised patch for getting rid of tcg temporary variable leaks in
target-arm/translate.c. This version also includes the leak patch for
gen_set_cpsr macro, now converted as a static inline function, which I
sent earlier as a separate patch on top of this patch.

Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-23 17:11:43 +02:00
Andre Przywara 31501a714b target-i386: implement lzcnt emulation
lzcnt is a AMD Phenom/Barcelona added instruction returning the
number of leading zero bits in a word.
As this is similar to the "bsr" instruction, reuse the existing
code. There need to be some more changes, though, as lzcnt always
returns a valid value (in opposite to bsr, which has a special
case when the operand is 0).
lzcnt is guarded by the ABM CPUID bit (Fn8000_0001:ECX_5).

Signed-off-by: Andre Przywara <andre.przywara@amd.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-23 17:10:36 +02:00
Aurelien Jarno cb2dbfc351 target-ppc: move often used CPU fields at the top of the structure
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-23 00:14:05 +02:00
Aurelien Jarno 686eeb93d5 target-arm: fix sdiv helper
(INT32_MIN / -1) triggers an overflow, and the result depends on the
host architecture (INT32_MIN on arm, -1 on ppc, SIGFPE on x86). Use a
test to output the correct value.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
2009-10-23 00:05:17 +02:00
Aurelien Jarno 7bbcb0afe7 target-arm: use clz32() instead of a for loop
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com>
2009-10-23 00:05:17 +02:00
Anthony Liguori 102251a4f3 Merge commit 'linux-user/linux-user-for-upstream' into staging 2009-10-21 13:36:49 -05:00
Gerd Hoffmann 59419663a1 qdev: add string property.
Patchworks-ID: 35755
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-21 13:35:37 -05:00
Amit Shah 6cfa64de90 char: emit the OPENED event only when a new char connection is opened
The OPENED event gets sent also when qemu resets its state initially.
The consumers of the event aren't interested in receiving this event
on reset.

Patchworks-ID: 35288
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-21 13:35:37 -05:00
Amit Shah b6b8df560c char: rename CHR_EVENT_RESET to CHR_EVENT_OPENED
The char event RESET is emitted when a char device is opened.
Give it a better name.

Patchworks-ID: 35287
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-21 13:35:37 -05:00
Amit Shah 69795d6769 char: check for initial_reset_issued unnecessary
At init, qemu_chr_reset is always called with initial_reset_issued set to 1.
So checking for it to be set is not necessary.

Patchworks-ID: 35286
Signed-off-by: Amit Shah <amit.shah@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-10-21 13:35:37 -05:00
Blue Swirl 544f4f0b5a bsd-user: fix breakage by 78cfb07fe0
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-18 18:44:38 +00:00
Blue Swirl 747bbdf79f Suppress warnings about 'warn_unused_result' attribute directive
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-18 16:26:06 +00:00
Juergen Lock 78cfb07fe0 bsd-user: FreeBSD update
basic FreeBSD sysarch(2) handling
fixed syscall errno return

Signed-off-by: Juergen Lock <nox@jelal.kn-bremen.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-18 15:16:08 +00:00
Blue Swirl 976b2037e5 x86: add 'static' to please Sparse
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-10-18 14:51:10 +00:00
Thomas Monjalon 74d77caeed target-ppc: simpler definitions for microcontrollers based on e300
No need to alias e300 core for each CPU package.
Differences between microcontrollers have to be implemented in a higher layer
than translate_init.c

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-18 16:15:47 +02:00
Thomas Monjalon 492d7bf5e9 target-ppc: add declarations of microcontrollers based on e300
Add CPU declarations of MPC8343, MPC8343E, MPC8347 and MPC8347E.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-18 16:15:39 +02:00
Thomas Monjalon 8daf178168 target-ppc: better support of e300 CPU core
Declare HID2 register.

Use high BATs for e300 (8 instead of 4).

Fix index of high BATs registers.
Before the fix, IBAT4-7 were overwriting IBAT0-3.

Signed-off-by: François Armand <francois.armand@os4i.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-18 16:15:34 +02:00
Aurelien Jarno dcc65026c4 target-arm: fix bugs introduced by 1b2b1e547b
Use load_reg_var() instead of accessing cpu_R[rn] directly to generate
correct code when rn = 15.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-18 16:00:18 +02:00
Aurelien Jarno 98a463171b target-arm: fix bugs introduced by 3174f8e91f
Use load_reg_var() instead of accessing cpu_R[rn] directly to generate
correct code when rn = 15.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-18 15:53:28 +02:00
Aurelien Jarno b567b38c2c target-arm: remove T0 and T1
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-17 23:53:08 +02:00
Filip Navara 747a651e8e target-arm: remove cpu_T for ARM once and for all
Signed-off-by: Filip Navara <filip.navara@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-17 23:52:18 +02:00
Filip Navara 312eea9f99 target-arm: convert VFP not to use cpu_T
Signed-off-by: Filip Navara <filip.navara@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-17 23:52:17 +02:00
Filip Navara da6b5335d5 target-arm: convert disas_iwmmxt_insn not to use cpu_T
Signed-off-by: Filip Navara <filip.navara@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-17 23:52:17 +02:00
Filip Navara 3a554c0f20 target-arm: convert disas_dsp_insn not use cpu_T
Signed-off-by: Filip Navara <filip.navara@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-10-17 23:52:17 +02:00