aurel32
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ae8ecd4231
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target-alpha: convert arith2 instructions to TCG
Replace gen_arith2 generic macro and dyngon ops by instruction specific
optimized TCG code.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5235 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-09-16 22:44:02 +00:00 |
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blueswir1
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2d8ee4e719
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Fix Sparc host compile problem reported by Shaddy Baddah
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3750 c046a42c-6fe2-441c-8c8c-71466251a162
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2007-12-01 08:18:52 +00:00 |
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j_mayer
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e14fe0a921
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Use host-utils for Alpha 64x64 bits multiplications.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3443 c046a42c-6fe2-441c-8c8c-71466251a162
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2007-10-25 23:34:44 +00:00 |
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ths
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5fafdf24ef
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find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
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2007-09-16 21:08:06 +00:00 |
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j_mayer
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4c9649a967
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Alpha architecture emulation core.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2597 c046a42c-6fe2-441c-8c8c-71466251a162
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2007-04-05 06:58:33 +00:00 |
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