Commit graph

6875 commits

Author SHA1 Message Date
Kevin Wolf 2844bdd99a ide: IDENTIFY word 86 bit 14 is reserved
Reserved bits should be cleared to zero.

Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-04-05 14:54:39 +02:00
Paolo Bonzini 85e8dab1ef aio: move BlockDriverAIOCB to qemu-aio.h
And remove several block_int.h inclusions that should not be there.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2012-04-05 14:54:39 +02:00
Artyom Tarasenko a7be9bad33 Improve interrupt handling priority
The vector interrupt has higher priority than interrupt_level_n.
Also check only interrupt_level_n concurency when TL > 0, the traps of
other types may be nested.

Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-04 19:20:44 +00:00
Artyom Tarasenko 23cf96e197 Fix vector interrupt handling
Don't produce stray irq 5, don't overwrite ivec_data if still busy with
processing of the previous interrupt.

Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-04 19:20:40 +00:00
Paolo Bonzini f05f6b4adb qdev: put all devices under /machine
Avoid cluttering too much the QOM root.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-04-02 15:04:15 -05:00
Paolo Bonzini da57febfed qdev: give all devices a canonical path
A strong limitation of QOM right now is that unconverted ports
(e.g. all...) do not give a canonical path to devices that are
part of the board.  This in turn makes it impossible to replace
PROP_PTR with a QOM link for example.

Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-04-02 15:04:15 -05:00
Paolo Bonzini f424d5c4c9 qdev: add children before qdev_init
We want the composition tree to to be in order by the time we call
qdev_init, so that a single set of the toplevel realize property can
propagate all the way down the composition tree.

This is not the case so far.  Unfortunately, this is incompatible
with calling qdev_init in the constructor wrappers for devices,
so for now we need to unattach some devices that are created through
those wrappers.  This will be fixed by removing qdev_init and instead
setting the toplevel realize property after machine init.

Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-04-02 15:04:15 -05:00
Paolo Bonzini a612b2a663 qom: add container_get
This is QOM "mkdir -p".  It is useful when referring to
container objects such as "/machine".

Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-04-02 15:04:15 -05:00
Anthony Liguori dfe844c904 serial: clear LSR.TEMT when populating the TSR
We never actually clear the TEMT (transmit sending register empty) flag when
populating the TSR.  We set the flag, but since it's never cleared, setting it
is sort of pointless..

I found this with a unit test case.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-04-02 09:43:17 -05:00
Anthony Liguori 67c5322d70 serial: fix retry logic
I'm not sure if the retry logic has ever worked when not using FIFO mode.  I
found this while writing a test case although code inspection confirms it is
definitely broken.

The TSR retry logic will never actually happen because it is guarded by an
'if (s->tsr_rety > 0)' but this is the only place that can ever make the
variable greater than zero.  That effectively makes the retry logic an 'if (0)'.

I believe this is a typo and the intention was >= 0.  Once this is fixed though,
I see double transmits with my test case.  This is because in the non FIFO
case, serial_xmit may get invoked while LSR.THRE is still high because the
character was processed but the retransmit timer was still active.

We can handle this by simply checking for LSR.THRE and returning early.  It's
possible that the FIFO paths also need some attention.

Cc: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-04-02 09:43:16 -05:00
Michael Walle a3b6181e42 milkymist-vgafb: add missing register
This bug existed since the first commit. Fortunately, the affected
registers have no functionality in qemu. This will only prevent the
following warning:
  milkymist_vgafb: write access to unknown register 0x00000034

Signed-off-by: Michael Walle <michael@walle.cc>
2012-04-01 20:30:24 +02:00
Michael Walle 060544d30f milkymist-sysctl: support for new core version
The new version introduces the following new registers:
 - SoC clock frequency: read-only of system clock used on the SoC
 - debug scratchpad: 8 bit scratchpad register
 - debug write lock: write once register, without any function on QEMU

Signed-off-by: Michael Walle <michael@walle.cc>
2012-03-31 20:02:30 +02:00
Blue Swirl b7c8e15a14 Merge branch 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm:
  pl031: switch clock base to rtc_clock
  pl031: rearm alarm timer upon load
  arm: switch real-time clocks to rtc_clock
  omap: switch omap_lpg to vm_clock
  rtc: add -rtc clock=rt
2012-03-31 12:10:07 +00:00
Anthony Liguori fd94be7ae6 rtc: split out macros into a header file and use in test case
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-30 08:14:12 -05:00
Paolo Bonzini 2028834574 qtest: IRQ interception infrastructure
Since /i440fx/piix3 is being removed from the composition tree, the
IO-APIC is placed under /i440fx.  This is wrong and should be changed
as soon as the /i440fx/piix3 path is put back.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-30 08:14:11 -05:00
Paolo Bonzini b0f26631bc pl031: switch clock base to rtc_clock
This lets the user specify the desired semantics.  By default, the RTC
will follow adjustments from the host's NTP client, and will remain in
sync when the virtual machine is stopped.  The previous behavior, which
provides determinism with both icount and qtest, remains available with
"-rtc clock=vm".

pl031 supports migration, so we need to convert the time base from
rtc_clock to vm_clock and back for backwards compatibility.  (The
rtc_clock may not be synchronized on the two machines, especially with
savevm/loadvm, so the conversion is needed anyway.  And since any time
base will do, why not pick the one base that is backwards compatible).

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-30 10:31:23 +00:00
Paolo Bonzini ac204b8f67 pl031: rearm alarm timer upon load
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-30 10:31:22 +00:00
Paolo Bonzini 348abc86c8 arm: switch real-time clocks to rtc_clock
This lets the user specify the desired semantics.  By default, the RTC
will follow adjustments from the host's NTP client.  "-rtc clock=vm" will
improve determinism with both icount and qtest.  Finally, the previous
behavior is available with "-rtc clock=rt".

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-30 10:31:22 +00:00
Paolo Bonzini e230d4e8bd omap: switch omap_lpg to vm_clock
The output of the pulse generator needs to be deterministic when
running in -icount mode, and to remain constant whenever the VM is
stopped.  So the right clock to use is vm_clock.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-30 10:31:22 +00:00
Anthony Liguori cbd5979bb2 Merge remote-tracking branch 'sstabellini/disk_io' into staging
* sstabellini/disk_io:
  xen_disk: when using AIO flush after the operation is completed
  xen_disk: open disk with BDRV_O_NOCACHE | BDRV_O_CACHE_WB | BDRV_O_NATIVE_AIO
2012-03-28 12:46:39 -05:00
Stefano Stabellini 7429f2e198 xen_disk: detach the blkdev before bdrv_delete
We need to detach the blkdev from the BlockDriverState before calling
bdrv_delete.

Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2012-03-27 16:05:21 +00:00
Stefano Stabellini 028c85f0ff xen_console: ignore console disconnect events from console/0
The first console has a different location compared to other PV devices
(console, rather than device/console/0) and doesn't obey the xenstore
state protocol. We already special case the first console in con_init
and con_initialise, we should also do it in con_disconnect.

Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2012-03-27 16:05:15 +00:00
Gerd Hoffmann 08c4ea294f fix screendump
Commit 45efb16124 optimized a bit too
much.  We can skip the vga_invalidate_display() in case no console
switch happened because we don't need a full redraw then.  We can *not*
skip vga_hw_update() though, because the screen content will be stale
then in case nobody else calls vga_hw_update().

Trigger: vga textmode with vnc display and no client connected.

Reported-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Alon Levy <alevy@redhat.com>
Tested-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-24 13:06:41 +00:00
Stefano Stabellini d56de07469 xen_disk: when using AIO flush after the operation is completed
If ioreq->postsync call bdrv_flush when the AIO operation is actually
completed.

Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2012-03-23 14:34:16 +00:00
Stefano Stabellini 820914103c xen_disk: open disk with BDRV_O_NOCACHE | BDRV_O_CACHE_WB | BDRV_O_NATIVE_AIO
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2012-03-23 14:33:54 +00:00
Anthony Liguori 33cf629a37 Merge remote-tracking branch 'sstabellini/saverestore-8' into staging
* sstabellini/saverestore-8:
  xen: do not allocate RAM during INMIGRATE runstate
  xen mapcache: check if memory region has moved.
  xen: record physmap changes to xenstore
  Set runstate to INMIGRATE earlier
  Introduce "xen-save-devices-state"
  cirrus_vga: do not reset videoram

Conflicts:
	qapi-schema.json

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-19 13:39:42 -05:00
Anthony Liguori b85a4ec8a7 Merge remote-tracking branch 'stefanha/trivial-patches' into staging
* stefanha/trivial-patches:
  qemu-ga: for w32, fix leaked handle ov.hEvent in ga_channel_write()
  ioapic: fix build with DEBUG_IOAPIC
  .gitignore: add qemu-bridge-helper and option rom build products
  cleanup obsolete typedef
  monitor: Remove unused bool field 'qapi' in mon_cmd_t struct
  ds1338: Add missing break statement
  vnc: Fix packed boolean struct members
  Remove type field in ModuleEntry as it's not used
2012-03-19 13:37:41 -05:00
Anthony Liguori dfebfcf02f Merge remote-tracking branch 'spice/spice.v50' into staging
* spice/spice.v50:
  spice: fix broken initialization
  hw/qxl.c: Fix compilation failures on 32 bit hosts
  qxl/qxl_render.c: add trace events
  qxl: switch qxl.c to trace-events
  qxl: init_pipe_signaling: exit on failure
  monitor: fix client_migrate_info error handling
  spice: set spice uuid and name
2012-03-19 13:37:23 -05:00
Anthony Liguori 49f54371f2 Merge remote-tracking branch 'bonzini/scsi-next' into staging
* bonzini/scsi-next:
  scsi: add get_dev_path
  virtio-scsi: call unregister_savevm properly
  scsi: copy serial number into VPD page 0x83
  scsi-cd: check ready condition before processing several commands
  get rid of CONFIG_VIRTIO_SCSI
2012-03-19 13:36:37 -05:00
Paolo Bonzini baa1bd8992 scsi: add get_dev_path
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-03-19 16:35:58 +01:00
Paolo Bonzini eb2fa76418 virtio-scsi: call unregister_savevm properly
This fixes a use-after-free when migrating after hot-unplug.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-03-19 16:35:43 +01:00
Paolo Bonzini fd9307912d scsi: copy serial number into VPD page 0x83
Currently QEMU passes the qdev device id to the guest in an ASCII-string
designator in page 0x83.  While this is fine, it does not match what
real hardware does; usually the ASCII-string designator there hosts
another copy of the serial number (there can be other designators,
for example with a world-wide name).  Do the same for QEMU SCSI
disks.

ATAPI does not support VPD pages, so it does not matter there.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-03-19 16:35:17 +01:00
Paolo Bonzini 9bcaf4fe26 scsi-cd: check ready condition before processing several commands
This commit is more or less obvious.  What it caused is less obvious:
SCSI CD drives failed to eject under Linux, though for example the
"change" command worked okay.  This happens because of the autoclose
option in the Linux CD-ROM driver.

The actual chain of events is quite complex and somehow involves
udev helpers; the actual command that matters is READ TOC, though
honestly it's not really clear to me how because it should always be
invoked after autoclose, not before.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2012-03-19 16:35:17 +01:00
Anthony Liguori b8b3e75609 Merge remote-tracking branch 'qemu-kvm/memory/urgent' into staging
* qemu-kvm/memory/urgent: (42 commits)
  memory: check for watchpoints when getting code ram_addr
  exec: fix write tlb entry misused as iotlb
  Sparc: avoid AREG0 wrappers for memory access helpers
  Sparc: avoid AREG0 for memory access helpers
  TCG: add 5 arg helpers to def-helper.h
  softmmu templates: optionally pass CPUState to memory access functions
  i386: Remove REGPARM
  sparc64: implement PCI and ISA irqs
  sparc: reset CPU state on reset
  apb: use normal PCI device header for PBM device
  w64: Fix data type of next_tb and tcg_qemu_tb_exec
  softfloat: fix for C99
  vmstate: fix varrays with uint32_t indexes
  Fix large memory chunks allocation with tcg_malloc.
  hw/pxa2xx.c: Fix handling of pxa2xx_i2c variable offset within region
  hw/pxa2xx_lcd.c: drop target_phys_addr_t usage in device state
  hw/pxa2xx_dma.c: drop target_phys_addr_t usage in device state
  ARM: Remove unnecessary subpage workarounds
  malta: Fix display for LED array
  malta: Use symbolic hardware addresses
  ...
2012-03-19 08:51:50 -05:00
Peter Maydell 5dba0d453d hw/qxl.c: Fix compilation failures on 32 bit hosts
Fix compilation failures on 32 bit hosts (cast from pointer to
integer of different size; %ld expects 'long int' not uint64_t).

Reported-by: Steve Langasek <steve.langasek@canonical.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-03-19 13:12:19 +01:00
Alon Levy d53291cf59 qxl/qxl_render.c: add trace events
Signed-off-by: Alon Levy <alevy@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-03-19 13:12:19 +01:00
Alon Levy c480bb7da4 qxl: switch qxl.c to trace-events
dprint is still used for qxl_init_common one time prints.

also switched parts of spice-display.c over, mainly all the callbacks to
spice server.

All qxl device trace events start with the qxl device id.

Signed-off-by: Alon Levy <alevy@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-03-19 13:12:19 +01:00
Alon Levy aa3db4236e qxl: init_pipe_signaling: exit on failure
If pipe creation fails, exit, don't log and continue. Fix indentation at
the same time.

Signed-off-by: Alon Levy <alevy@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2012-03-19 13:12:19 +01:00
Jason Wang 0c1f781b7c ioapic: fix build with DEBUG_IOAPIC
ioapic.c:198: error: format ‘%08x’ expects type ‘unsigned int’, but argument 3 has type ‘uint64_t’

Signed-off-by: Jason Wang <jasowang@redhat.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-03-19 11:30:56 +00:00
Stefan Weil fbac6a7d35 ds1338: Add missing break statement
Without the break statement, case 5 sets month and year from the same
data. This does not look correct.

The missing break was reported by splint.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2012-03-19 10:52:52 +00:00
Blue Swirl 361dea401f sparc64: implement PCI and ISA irqs
Generate correct trap for external interrupts. Map PCI and ISA IRQs to
RIC/UltraSPARC-IIi interrupt vectors.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-17 16:30:06 +00:00
Blue Swirl b21227c499 apb: use normal PCI device header for PBM device
PBM has a normal PCI device header, fix.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-17 16:29:47 +00:00
Blue Swirl 103f9af2a1 Merge branch 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm:
  hw/pxa2xx.c: Fix handling of pxa2xx_i2c variable offset within region
  hw/pxa2xx_lcd.c: drop target_phys_addr_t usage in device state
  hw/pxa2xx_dma.c: drop target_phys_addr_t usage in device state
  ARM: Remove unnecessary subpage workarounds
  hw/omap_i2c: Convert to qdev
2012-03-17 16:23:19 +00:00
Blue Swirl 6b41fecf2e Merge branch 'malta' of git://qemu.weilnetz.de/qemu
* 'malta' of git://qemu.weilnetz.de/qemu:
  malta: Fix display for LED array
  malta: Use symbolic hardware addresses
  malta: Always allocate flash memory
  malta: Clean allocation of bios region alias
2012-03-17 12:59:36 +00:00
Anthony Liguori e5ab1404d0 pci: fix double free of romfile property
The qdev property release function frees any string properties.  This was
resulting in a double free during hot unplug.

It manifests in network devices because block devices have a NULL romfile
property by default.

Cc: Michael Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-16 13:17:06 -05:00
Peter Maydell 14dd5faa7e hw/pxa2xx.c: Fix handling of pxa2xx_i2c variable offset within region
The pxa2xx I2C controller can have its registers at an arbitrary offset
within the MemoryRegion it creates. We use this to create two controllers,
one which covers a region of size 0x10000 with registers starting at an
offset 0x1600 into that region, and a second one which covers a region
of size just 0x100 with the registers starting at the base of the region.

The implementation of this offsetting uses two qdev properties, "offset"
(which sets the offset which must be subtracted from the address to
get the offset into the actual register bank) and "size", which is the
size of the MemoryRegion. We were actually using "offset" for two
purposes: firstly the required one of handling the registers not being
at the base of the MemoryRegion, and secondly as a workaround for a
deficiency of QEMU. Until commit 5312bd8b3, if a MemoryRegion was mapped
at a non-page boundary, the address passed into the read and write
functions would be the offset from the start of the page, not the
offset from the start of the MemoryRegion. So when calculating the value
to set the "offset" qdev property we included a rounding to a page
boundary.

Following commit 5312bd8b3 MemoryRegion read/write functions are now
correctly passed the offset from the base of the region, and our
workaround now means we're subtracting too much from addresses, resulting
in warnings like "pxa2xx_i2c_read: Bad register 0xffffff90".
The fix for this is simply to remove the rounding to a page boundary;
this allows us to slightly simplify the expression since
  base - (base & (~region_size)) == base & region_size

The qdev property "offset" itself must remain because it is still
performing its primary job of handling register banks not being at
the base of the MemoryRegion.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
2012-03-16 18:09:55 +00:00
Mitsyanko Igor 27424dcc68 hw/pxa2xx_lcd.c: drop target_phys_addr_t usage in device state
Pxa2xx LCD controller is intended to work with 32-bit bus and it has no knowledge
of system's physical address size, so it should not use target_phys_addr_t in it's
state. Convert three variables in DMAChannel state from target_phys_addr_t to uint32_t,
use VMSTATE_UINT32 instead of VMSTATE_UINTTL for these variables.
We can do this safely because:
1) pxa2xx has 32-bit physical address;
2) rest of the code in file never assumes converted variables to have any size
different from uint32_t;
3) we shouldn't have used VMSTATE_UINTTL in the first place because this macro
is for target_ulong type (which can be different from target_phys_addr_t).

Signed-off-by: Igor Mitsyanko <i.mitsyanko@samsung.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-16 18:09:55 +00:00
Mitsyanko Igor a10394e1da hw/pxa2xx_dma.c: drop target_phys_addr_t usage in device state
Pxa2xx DMA controller is a 32-bit device and it has no knowledge of system's
physical address size, so it should not use target_phys_addr_t in it's state.
Convert variables descr, src and dest from type target_phys_addr_t to uint32_t,
use VMSTATE_UINT32 instead of VMSTATE_UINTTL for these variables.

We can do this safely because:
1) pxa2xx actually has 32-bit physical address size;
2) rest of the code in file never assumes descr, src and dest variables to have
size different from uint32_t;
3) we shouldn't have used VMSTATE_UINTTL in the first place because this macro
is for target_ulong type (which can be different from target_phys_addr_t).

Signed-off-by: Igor Mitsyanko <i.mitsyanko@samsung.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2012-03-16 18:09:55 +00:00
Peter Maydell 0e4a398ab2 ARM: Remove unnecessary subpage workarounds
In the ARM per-CPU peripherals (GIC, private timers, SCU, etc),
remove workarounds for subpage memory region read/write functions
being passed offsets from the start of the page rather than the
start of the region. Following commit 5312bd8b3 the masking off
of high bits of the address offset is now harmless but unnecessary.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
2012-03-16 18:09:55 +00:00
Stefan Weil 1d7a119706 malta: Fix display for LED array
The 8-LED array was already implemented in the first commit to Malta,
but this implementation was incomplete.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
2012-03-15 20:55:45 +01:00