Commit graph

10 commits

Author SHA1 Message Date
Blue Swirl 71547a3bf3 qemu-log: use LOG_UNIMP for some target CPU cases
Use LOG_UNIMP for some target CPU cases.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Acked-by: Alexander Graf <agraf@suse.de>
2012-06-21 18:45:22 +00:00
Artyom Tarasenko 00b2ace509 fix block loads broken in commit 30038fd818
Fix UltraSPARC/JPS1/UA2007 VIS block load instructions broken in
30038fd818.

Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
[blauwirbel@gmail.com: trimmed unwanted part of patch]
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-05-12 09:48:05 +00:00
Blue Swirl 2050396801 Use uintptr_t for various op related functions
Use uintptr_t instead of void * or unsigned long in
several op related functions, env->mem_io_pc and
GETPC() macro.

Reviewed-by: Stefan Weil <sw@weilnetz.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-04-14 14:23:37 +00:00
Blue Swirl 0184e266cb Sparc: avoid AREG0 wrappers for memory access helpers
Adjust generation of load and store templates so that the functions
take a parameter for CPUState instead of relying on global env.

Remove wrappers. Move remaining memory helpers to ldst_helper.c.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-18 12:22:02 +00:00
Blue Swirl fe8d8f0f1c Sparc: avoid AREG0 for memory access helpers
Make memory access helpers take a parameter for CPUState instead
of relying on global env. Introduce wrappers for load and store ops.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-18 12:22:00 +00:00
Blue Swirl 361dea401f sparc64: implement PCI and ISA irqs
Generate correct trap for external interrupts. Map PCI and ISA IRQs to
RIC/UltraSPARC-IIi interrupt vectors.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2012-03-17 16:30:06 +00:00
Andreas Färber c5f9864e89 target-sparc: Don't overuse CPUState
Scripted conversion:
  sed -i "s/CPUState/CPUSPARCState/g" target-sparc/*.[hc]
  sed -i "s/#define CPUSPARCState/#define CPUState/" target-sparc/cpu.h

Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Anthony Liguori <aliguori@us.ibm.com>
2012-03-14 22:20:25 +01:00
Richard Henderson 30038fd818 target-sparc: Change fpr representation to doubles.
This allows a more efficient representation for 64-bit hosts.
It should be about the same for 32-bit hosts, as we can still
access the individual pieces of the double.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-26 13:55:26 -07:00
Richard Henderson 03fb8cfc63 target-sparc: Pass float64 parameters instead of dt0/1 temporaries.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-10-26 13:50:45 -07:00
Blue Swirl fafd8bceb5 Sparc: split load and store op helpers
Move load and store op helpers top ldst_helper.c.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-10-26 17:19:20 +00:00