bellard
39cf05d322
more generic call codegen
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4528 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 14:59:57 +00:00
bellard
cf60bce405
fixed zero shifts (64 bit case)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4527 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 14:39:25 +00:00
bellard
34151a20ea
small shift opts
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4525 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-22 13:25:14 +00:00
bellard
e5097dc8e3
fixed dead global variable update
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4512 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 16:24:20 +00:00
balrog
204c1674ef
Fix 8-bit signed load/store and a typo.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4504 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-20 11:28:35 +00:00
balrog
650bbb361e
Implement neg_i32, clean-up.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4503 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-20 11:26:40 +00:00
balrog
a2a64a1f2d
Remove dyngen ARM code, which did't build.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4501 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-20 00:01:55 +00:00
balrog
811d4cf4b0
ARM host support for TCG targets.
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Updated from previous version to use the tcg prologue/epilogue mechanism, may be slower than direct call.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4500 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-19 23:59:38 +00:00
blueswir1
c44f945a92
Better solution for the alignment problem
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4498 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-19 16:32:18 +00:00
ths
48d38ca52b
Switch most MIPS logical and arithmetic instructions to TCG.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4496 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-18 22:50:49 +00:00
blueswir1
57e49b4074
Fix constant checks on Sparc64 host
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4486 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-18 08:11:14 +00:00
blueswir1
d4929d58a1
Fix TCG alignment problems on Sparc64 host
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4485 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-18 07:49:05 +00:00
bellard
c6e113f568
added 'pure' function attribute - fixed indirect function calls
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4469 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 12:42:15 +00:00
bellard
0b6ce4cffe
added not pseudo op - more _tl macros
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4468 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 12:40:44 +00:00
blueswir1
9a7f32283c
Fix qemu_ld/st branches, constification, use orcc for tst synthetic op
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4466 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 09:41:14 +00:00
blueswir1
f5ef6aacd4
Implement qemu_ld/st, fix brcond, handle more corner cases
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4463 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-16 20:15:58 +00:00
blueswir1
cf7c2ca5ff
Implement brcond, ldst with large offset; fix direct jump, prologue
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4461 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-15 19:44:09 +00:00
blueswir1
f02ca5cbea
Fix bit fitting checks
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4460 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-15 17:30:17 +00:00
blueswir1
7d55170268
Fix compilation on Sparc host, implement ld and st
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4457 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-14 19:22:05 +00:00
bellard
6a8d7b7637
temporary hack to handle register shortage with dyngen for qemu_st64()
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4438 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 13:49:14 +00:00
pbrook
390efc54fb
Add TCG native negation op.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4426 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-11 14:35:37 +00:00
pbrook
868314358e
Add zero extension (pseudo-)ops.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4424 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-11 12:22:01 +00:00
bellard
3375984648
REXB optimization cannot be done at this level
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4420 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 21:58:28 +00:00
bellard
3c3a1d200c
fixed qemu_st8 insn - prologue saved too many registers
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4418 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 21:42:05 +00:00
pbrook
9815642347
Fix DEBUG_TCGV.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4415 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 18:43:02 +00:00
blueswir1
bf6247fb76
Rename CONFIG_NO_DYNGEN_OP to CONFIG_DYNGEN_OP to avoid double negatives
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4412 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 12:27:33 +00:00
bellard
b03cce8e08
fixed global variable handling with qemu load/stores - initial global prologue/epilogue implementation
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4406 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 10:52:05 +00:00
balrog
c7b76a0ae3
Fix i64 remainder calculation copy-paste error.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4357 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-06 14:40:28 +00:00
ths
f730fd27b8
Add helpers and shorthands for mul and muli operations.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4319 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04 08:14:08 +00:00
blueswir1
4d07272d80
Skip register moves when the target and the source are the same
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4312 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-03 20:52:26 +00:00
aurel32
f54b3f920f
HPPA (PA-RISC) host support
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(Stuart Brady)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4199 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-12 20:14:54 +00:00
aurel32
ca10f86763
Remove osdep.c/qemu-img code duplication
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(Kevin Wolf)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4191 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-11 21:35:42 +00:00
pbrook
b010980544
ARM TCG conversion 9/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4146 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:47:03 +00:00
pbrook
6ddbc6e4cf
ARM TCG conversion 7/16.
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4144 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-31 03:46:33 +00:00
blueswir1
e429073d4e
Add TL variants of trunc and ext/extu
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4099 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-22 08:39:04 +00:00
blueswir1
cf2be98437
Prepare for op.c removal and zero legacy ops
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4095 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 18:03:09 +00:00
blueswir1
fb50d4134d
Make TCG br op available
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4093 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 17:58:45 +00:00
blueswir1
c4071c9014
Increase max temps limit
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4074 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-16 19:21:07 +00:00
blueswir1
a768e4b25a
Add discard_ptr and discard_tl
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4072 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-16 19:16:37 +00:00
blueswir1
a98824ac42
Add tcg_const_tl
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4053 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-13 20:46:42 +00:00
blueswir1
e4d5434c3a
Fix i32 memory backed variables on 64-bit host
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4044 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-13 17:34:19 +00:00
aurel32
5e85404a56
TCG README fixes (Stuart Brady)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4042 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-12 21:40:02 +00:00
blueswir1
0954d0d9e2
Remove blank elements in tcg_target_reg_alloc_order[] (Stuart Brady)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4039 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-11 21:01:02 +00:00
blueswir1
b3db875812
Add function prologue, fix pointer load on Sparc64 host
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4027 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-08 13:33:42 +00:00
blueswir1
53cd927312
Update based on Stuart Brady's comments
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4026 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-07 18:21:39 +00:00
pbrook
21fc3cfc10
32-bit host sign extension fix (Juergen Lock).
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4017 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-04 23:52:47 +00:00
blueswir1
0cf767d663
Add brcond_tl
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4008 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-02 18:20:59 +00:00
blueswir1
bffd92fed9
Fix compiler warning
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4003 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-29 19:36:08 +00:00
blueswir1
2f0a500803
Fix register references (Igor Kovalenko)
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4002 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-29 19:34:39 +00:00
blueswir1
8289b27975
Preliminary Sparc TCG target
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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3995 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-27 17:53:27 +00:00