blueswir1
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5578ceab94
|
Use initial CPU definition structure for some CPU fields instead of copying
them around, based on patch by Luis Pureza.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5042 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-08-21 17:33:42 +00:00 |
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blueswir1
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2ae72bce02
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Correct 32bit carry flag for add instruction (Igor Kovalenko)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5017 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-08-17 08:33:47 +00:00 |
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blueswir1
|
01b1fa6d16
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Fix Sparc64 shifts
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4990 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-08-06 18:13:54 +00:00 |
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blueswir1
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95f9397c75
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Fix offset handling for ASI loads and stores (Vince Weaver)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4988 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-08-06 15:28:20 +00:00 |
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blueswir1
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dd5e6304aa
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Fix cmp/subcc/addcc op bugs reported by Vince Weaver
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4970 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-07-29 18:11:20 +00:00 |
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blueswir1
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fb79ceb91a
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Make UA200x features selectable, add MMU types
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4911 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-07-20 18:22:16 +00:00 |
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blueswir1
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db166940e2
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Implement nucleus quad ldda
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4902 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-07-19 13:25:28 +00:00 |
|
ths
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2cfc5f17d3
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Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4891 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-07-18 18:01:29 +00:00 |
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blueswir1
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8d7d8c4bb1
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wrhpr hstick_cmpr is a store, not a load
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4887 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-07-18 10:26:07 +00:00 |
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blueswir1
|
2cade6a3f6
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Support for address masking
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4882 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-07-17 12:53:05 +00:00 |
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blueswir1
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c5f2f66835
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Flushw can generate exceptions, so save PC & NPC
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4876 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-07-16 11:51:15 +00:00 |
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blueswir1
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71817e4898
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Really fix cas
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4869 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-07-15 14:52:09 +00:00 |
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pbrook
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2e70f6efa8
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Add instruction counter.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-06-29 01:03:05 +00:00 |
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blueswir1
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d987963aa9
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Eliminate cpu_T[0]
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4776 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-06-22 10:58:57 +00:00 |
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blueswir1
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3f0436fe85
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Eliminate cpu_T[1]
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4775 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-06-22 08:52:58 +00:00 |
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blueswir1
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ece43b8d06
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Convert some cpu_dst uses (with loads/stores) to cpu_tmp0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4772 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-06-21 19:50:10 +00:00 |
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blueswir1
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5c6a0628b7
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Avoid brcond problems, use temps for cpu_src1 & cpu_src2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4771 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-06-21 19:46:48 +00:00 |
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blueswir1
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07bf2857b8
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Avoid temporary variable use across basic blocks for udivx
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4744 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-06-15 18:06:39 +00:00 |
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blueswir1
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1a14026e11
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Allow NWINDOWS selection (CPU feature with model specific defaults)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4690 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-06-07 08:07:37 +00:00 |
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blueswir1
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e30b467893
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MicroSparc I didn't have fsmuld op
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4618 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-29 18:20:36 +00:00 |
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blueswir1
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2ea815cac7
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Free temps
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4591 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-27 19:39:12 +00:00 |
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blueswir1
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8d96d20941
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More TCG type fixes
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4589 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-26 19:42:42 +00:00 |
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blueswir1
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ef28fd8673
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Fix cas on i386
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4587 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-26 17:53:41 +00:00 |
|
bellard
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4f7de37327
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remove absolete function
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4579 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-25 18:01:40 +00:00 |
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blueswir1
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a8c768c069
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Nicer debug output
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4573 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-25 11:17:46 +00:00 |
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pbrook
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bcb0126ff4
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More TCGv type fixes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4553 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-24 02:24:25 +00:00 |
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pbrook
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cb63669a54
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Fix ARM conditional branch bug.
Add tcg_gen_brcondi.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-24 02:22:00 +00:00 |
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pbrook
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455f900486
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Fix helper operand type mismatch.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4551 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-24 02:12:32 +00:00 |
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blueswir1
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c9e03d8f68
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Register op helpers
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4534 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-22 18:16:25 +00:00 |
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blueswir1
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e35298cd1f
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Generate better code for Sparc32 shifts
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4467 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-17 09:43:12 +00:00 |
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blueswir1
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77f193daa8
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Wrap long lines
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4440 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-12 16:13:33 +00:00 |
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blueswir1
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c2bc0e3880
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Remove someexplicit alignment checks (initial patch by Fabrice Bellard)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4431 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-11 19:24:10 +00:00 |
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blueswir1
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0dcda9be6b
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Add a TODO file
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4410 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-10 12:09:24 +00:00 |
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bellard
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7c60cc4bca
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suppressed fixed registers
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4408 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-10 10:58:20 +00:00 |
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blueswir1
|
22548760ca
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Fix compiler warnings
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4404 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-10 10:12:00 +00:00 |
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blueswir1
|
64a88d5d3a
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CPU feature selection support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4399 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-09 20:13:43 +00:00 |
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blueswir1
|
9c6c6662d1
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Simplify some constant loads
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4383 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-07 18:04:29 +00:00 |
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blueswir1
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ba28189bac
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Fix potential condition code problems
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4382 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-07 18:03:02 +00:00 |
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blueswir1
|
7fa76c0bf3
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Complete the TCG conversion
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4323 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-04 11:58:45 +00:00 |
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blueswir1
|
653ccb8099
|
Avoid some brconds
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4318 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-04 08:06:33 +00:00 |
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blueswir1
|
6f551262b3
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Use memory based registers in functions containing brconds
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4311 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-05-03 20:51:00 +00:00 |
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aurel32
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d2856f1ad4
|
Factorize code in translate.c
(Glauber Costa)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4274 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-04-28 00:32:32 +00:00 |
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blueswir1
|
4b8b8b76d4
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Document the shift values
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4243 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-04-23 17:12:35 +00:00 |
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pbrook
|
2a39bc41cb
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Remove incorrect discards and old unused defines (blueswir1).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4137 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-03-30 19:47:23 +00:00 |
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blueswir1
|
a49d9390d4
|
Change handling of source 2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4135 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-03-29 20:39:41 +00:00 |
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blueswir1
|
9322a4bf0b
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Change handling of source register 1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4134 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-03-29 20:38:35 +00:00 |
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blueswir1
|
c48fcb4751
|
Move CPU stuff unrelated to translation to helper.c
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4133 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-03-29 15:46:56 +00:00 |
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blueswir1
|
6ae20372d4
|
Rename T[012] according to their roles
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4131 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-03-29 09:09:25 +00:00 |
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blueswir1
|
32b6c8125c
|
Avoid writes to T1 except for loads/stores, convert some T0 uses to cpu_tmp0
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4130 c046a42c-6fe2-441c-8c8c-71466251a162
|
2008-03-29 09:03:48 +00:00 |
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blueswir1
|
31741a27fa
|
Accidentally dropped one change from previous commit
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4129 c046a42c-6fe2-441c-8c8c-71466251a162
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2008-03-29 08:59:48 +00:00 |
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