Commit graph

116 commits

Author SHA1 Message Date
Richard Henderson a18ad89351 target-alpha: All ISA checks to use TB->FLAGS.
We had two different methods in use, both of which referenced ENV,
and neither of which indicated to the generic code when different
compilation modes are not compatible.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31 10:18:05 -07:00
Richard Henderson 26b4609447 target-alpha: Add IPRs to be used by the emulation PALcode.
These aren't actually used yet, but we can at least access
them via the HW_MFPR and HW_MTPR instructions.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31 10:18:05 -07:00
Richard Henderson bba9bdcee8 target-alpha: Use kernel mmu_idx for pal_mode.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31 10:18:05 -07:00
Richard Henderson ea879fc719 target-alpha: Add various symbolic constants.
The EXC_M_* constants were being set for the EV6, not as set for
the Unix kernel entry point.

Use PS_USER_MODE instead of hard-coding access to the PS register.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31 10:18:05 -07:00
Richard Henderson 07b6c13b09 target-alpha: Tidy exception constants.
There's no need to attempt to match EXCP_* values with PALcode entry
point offsets.  Instead, compress all the values to make for more
efficient switch statements within QEMU.

We will be doing TLB fill within QEMU proper, not within the PALcode,
so all of the ITB/DTB miss, double fault, and access exceptions can
be compressed to EXCP_MMFAULT.

Compress all of the EXCP_CALL_PAL exceptions into one.
Use env->error_code to store the specific entry point.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31 10:18:05 -07:00
Richard Henderson 129d8aa575 target-alpha: Rationalize internal processor registers.
Delete all the code that tried to emulate the real IPRs of some
unnamed CPU.  Replace those with just 3 slots that we can use to
communicate trap information between the helper functions that
signal exceptions and the OS trap handler.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31 10:18:05 -07:00
Richard Henderson 508b43eaf3 target-alpha: Merge HW_REI and HW_RET implementations.
Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31 10:18:05 -07:00
Richard Henderson 8417845ee9 target-alpha: Cleanup MMU modes.
Don't bother including executive and supervisor modes.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31 10:18:05 -07:00
Richard Henderson e52458fe29 target-alpha: Fix system store_conditional
This code contained typos, as it had never been compiled.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31 10:18:05 -07:00
Richard Henderson 2374e73eda target-alpha: Fix translation of PALmode memory insns.
All of the "raw" memory accesses should be "phys" instead.  Fix
some confusion about argument ordering of the store routines.
Fix the implementation of store-conditional.

Delete the "alt-mode" helpers.  Because we only implement two
mmu modes, let /a imply user-mode unconditionally.

Leave some combinations of virt access without permission
checks as unimplemented.  There are too many hoops through
which to jump, and these insns will not be needed in the
emulation palcode.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31 10:18:04 -07:00
Richard Henderson 352e48b0f4 target-alpha: Remove partial support for palcode emulation.
This code does not work, and will be replaced by a bios image.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31 10:18:04 -07:00
Richard Henderson bf1b03fe18 target-alpha: Single-step properly across branches.
We were failing to generate EXC_DEBUG in the EXIT_PC_UPDATED path.
This caused us not to stop at the instruction after a branch, but
on the instruction afterward.

Signed-off-by: Richard Henderson <rth@twiddle.net>
2011-05-31 10:18:04 -07:00
Stefan Weil e87b7cb0f0 Remove unused function parameters from gen_pc_load and rename the function
Function gen_pc_load was introduced in commit
d2856f1ad4.
The only reason for parameter searched_pc was
a debug statement in target-i386/translate.c.

Parameter puc was needed by target-sparc until
commit d7da2a1040.

Remove searched_pc from the debug statement and remove both
parameters from the parameter list of gen_pc_load.

As the function name gen_pc_load was also misleading,
it is now called restore_state_to_opc. This new name
was suggested by Peter Maydell, thanks.

v2: Remove last parameter, too, and rename the function.

v3: Fix [] typo in target-arm/translate.c.
    Fix wrong SHA1 object name in commit message (copy+paste error).

Cc: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
2011-04-20 10:33:59 +02:00
Stefan Weil 4b4a72e556 Fix conversions from pointer to tcg_target_long
tcg_gen_exit_tb takes a parameter of type tcg_target_long,
so the type casts of pointer to long should be replaced by
type casts of pointer to tcg_target_long (suggested by Blue Swirl).

These changes are needed for build environments where
sizeof(long) != sizeof(void *), especially for w64.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-10 00:45:16 +02:00
Richard Henderson 6910b8f66a target-alpha: Fix load-locked/store-conditional.
Use an exception plus start_exclusive to implement the compare-and-swap.
This follows the example set by the MIPS and PPC ports.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27 05:50:41 +02:00
Richard Henderson 8aa3fa2038 target-alpha: Indicate NORETURN status when raising exception.
When (indirectly) calling raise_exception, don't emit cleanup
code at the end of the TB, as it is unused.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27 05:50:41 +02:00
Richard Henderson 49563a7274 target-alpha: Update commentary for opcode 0x1A.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27 05:50:41 +02:00
Richard Henderson 4af7037462 target-alpha: Emit goto_tb opcodes.
Use an ExitStatus enumeration instead of magic numbers as the return
value from translate_one.  Emit goto_tb opcodes when ending a TB via
a direct branch.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27 05:50:41 +02:00
Richard Henderson 593f17e5f2 target-alpha: Implement cvtlq inline.
It's a simple shift and mask sequence.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27 05:50:41 +02:00
Richard Henderson ac316ca4b7 target-alpha: Implement rs/rc properly.
This is a per-cpu flag; there's no need for a spinlock of any kind.

We were also failing to manipulate the flag with $31 as a target reg
and failing to clear the flag on execution of a return-from-interrupt
instruction.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27 05:50:41 +02:00
Richard Henderson dc96be4b97 target-alpha: Implement cpys{, n, e} inline.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-27 05:50:41 +02:00
Blue Swirl f88fe4e370 alpha: remove dead assignments, spotted by clang analyzer
Value stored is never read.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-25 20:30:17 +00:00
Richard Henderson bbe1dab430 target-alpha: Use non-inverted arguments to gen_{f}cmov.
The inverted conditions as argument to the function looks wrong
at a glance inside translate_one.  Since we have an easy function
to produce the inversion now, use it.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-10 02:44:32 +02:00
Richard Henderson 9e05960fdc target-alpha: Use setcond for int comparisons.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-10 02:44:32 +02:00
Richard Henderson 735cf45f9c target-alpha: Implement cvtql inline.
It's a simple mask and shift sequence.
Also, fix a typo in the actual masks used.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-10 02:44:31 +02:00
Richard Henderson 6049f4f831 alpha-linux-user: Implement signals.
Move userland PALcode handling into linux-user main loop so that
we can send signals from there.  This also makes alpha_palcode.c
system-level only, so don't build it for userland.  Add defines
for GENTRAP PALcall mapping to signals.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-28 17:54:52 +01:00
Richard Henderson f24518b502 target-alpha: Implement IEEE FP qualifiers.
IEEE FP instructions are split up so that the rounding mode
coming from the instruction and exceptions (both masking and
delivery) are handled external to the base FP operation.
FP exceptions are properly raised for non-finite inputs to
instructions that do not indicate software completion.

A shortcut is applied if CONFIG_SOFTFLOAT_INLINE is defined
at the top of translate.c: data is loaded and stored into
FP_STATUS directly instead of using the functional interface
defined by "softfloat.h".

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-28 17:45:07 +01:00
Richard Henderson dad081ee69 target-alpha: Reduce internal processor registers for user-mode.
The existing set of IPRs is totally irrelevant to user-mode emulation.
Indeed, they most are irrelevant to implementing kernel-mode emulation,
and would only be relevant to PAL-mode emulation, which I suspect that
no one will ever attempt.

Reducing the set of processor registers reduces the size of the CPU state.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-02-23 23:36:22 +01:00
Richard Henderson 2edd07ef03 target-alpha: Initialize fpcr
Linux, at least, disables exceptions by default.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-23 07:13:45 +01:00
Richard Henderson c4b3be3966 target-alpha: Emit tcg debug_insn_start.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-21 11:29:50 +01:00
Richard Henderson dbb30fe6ef target-alpha: Implement fp branch/cmov inline.
The old fcmov implementation had a typo:
-        tcg_gen_mov_i64(cpu_fir[rc], cpu_fir[ra]);
which moved the condition, not the second source, to the destination.

But it's also easy to implement the simplified fp comparison inline.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-17 18:12:02 +01:00
Richard Henderson d9a50a366f target-alpha: Fix double log_cpu_state.
The proper logging is handled by generic code.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 21:36:21 +01:00
Richard Henderson a06d48d91f target-alpha: Fix FMOV.
Properly handle move from the zero register.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 21:36:21 +01:00
Richard Henderson 50eb6e5c04 target-alpha: Expand ins*h inline.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 21:36:21 +01:00
Richard Henderson ffec44f14f target-alpha: Expand msk*h inline.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 21:36:21 +01:00
Richard Henderson 14ab163429 target-alpha: Expand msk*l inline.
Similar in difficulty to ext*l, already expanded.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 21:36:21 +01:00
Richard Henderson 248c42f393 target-alpha: Expand ins*l inline.
Similar in difficulty to ext*l, already expanded.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 21:36:21 +01:00
Richard Henderson ab471ade02 target-alpha: Implement RD/WRUNIQUE in the translator
When emulating user-mode only, there's no reason to exit
the translation block to effect a call_pal.  We can generate
a move to/from the unique slot directly.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 21:36:16 +01:00
Richard Henderson 73651cce62 target-alpha: Fix fbcond branch offset.
The instructions use a disp21 like all other branch insns,
not the disp16 that was being passed.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 21:26:26 +01:00
Richard Henderson 377a43b6fb target-alpha: Rewrite gen_ext_[hl] in terms of zapnot.
The architecture manual specifies the EXT instructions
in terms of the ZAPNOT operation; writing it that way in
the translator makes things a bit clearer.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 21:26:26 +01:00
Richard Henderson 87d98f9551 target-alpha: Expand zap/zapnot with immediate inline.
The vast majority of zap instructions have an immediate operand,
since zapnot is the canonical method to zero-extend from u16 or u32.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 21:26:26 +01:00
Richard Henderson 806991da3a target-alpha: Fix -d in_asm
Generic disassembly was incorrectly keyed on ALPHA_DEBUG_DISAS
rather than the generic DEBUG_DISAS.  Use qemu_log_mask for
additional LOG_DISAS output.  Delete some random insn_count
logging noise from gen_intermediate_code_internal.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 21:26:26 +01:00
Richard Henderson 13e4df99ce target-alpha: Implement missing MVI instructions.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 21:26:26 +01:00
Richard Henderson a964acc6bf target-alpha: Honor the -cpu command line argument.
Also change the default cpu to ev67.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 20:32:36 +01:00
Richard Henderson 19188121b4 target-alpha: Remove bogus DO_TB_FLUSH code from translator.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-12-13 20:32:36 +01:00
Vince Weaver dbf9580588 target-alpha: fix extlh instruction
The extlh instruction on Alpha currently doesn't work properly.
It's a combination of a cut/paste bug (16 where it should be 32) as well
as a "shift by 64" bug.

Signed-off-by: Vince Weaver <vince@csl.cornell.edu>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2009-09-18 17:22:37 +02:00
Blue Swirl 72cf2d4f0e Fix sys-queue.h conflict for good
Problem: Our file sys-queue.h is a copy of the BSD file, but there are
some additions and it's not entirely compatible. Because of that, there have
been conflicts with system headers on BSD systems. Some hacks have been
introduced in the commits 15cc923584,
f40d753718,
96555a96d7 and
3990d09adf but the fixes were fragile.

Solution: Avoid the conflict entirely by renaming the functions and the
file. Revert the previous hacks.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-09-12 07:36:22 +00:00
Blue Swirl 636aa20056 Replace always_inline with inline
We define inline as always_inline.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-08-16 09:06:54 +00:00
Blue Swirl 8167ee8839 Update to a hopefully more future proof FSF address
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2009-07-16 20:47:01 +00:00
aliguori 0bf46a40a1 qemu: introduce qemu_init_vcpu (Marcelo Tosatti)
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7242 c046a42c-6fe2-441c-8c8c-71466251a162
2009-04-24 18:03:41 +00:00