bellard
bd7a7b33df
convert eflags manipulation insns to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4515 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 17:07:20 +00:00
bellard
3bd7da9e18
convert remaining segment handling to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4514 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 16:34:06 +00:00
bellard
cec6843e87
converted LSL/LAR/VERW/VERR to TCG - force 16 bit memory access for LSL/LAR
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4513 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 16:25:27 +00:00
bellard
839bca8467
suppressed no longer used ops
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4511 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 13:34:27 +00:00
bellard
07be379fb1
converted INTO/CMPXCHG8B to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4510 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 13:29:45 +00:00
bellard
9d0763c4c0
converted BCD ops to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4509 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 13:24:30 +00:00
bellard
0211e5aff9
converted MUL/IMUL to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4508 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-21 10:12:54 +00:00
bellard
6e0d8677cb
converted string OPs and LOOP insns to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4494 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-18 19:28:26 +00:00
bellard
cd31fefaf2
fixed INC/DEC condition codes
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4493 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-18 19:19:57 +00:00
bellard
e108dd01ce
converted sign extension ops to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4481 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 19:24:07 +00:00
bellard
bbf662ee31
MONITOR insn address generation fix - converted XLAT to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4479 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 19:05:28 +00:00
bellard
6191b05901
BSR/BSF TCG conversion
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4477 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 18:44:58 +00:00
bellard
f484d38622
converted bit test operations to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4473 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 16:10:38 +00:00
bellard
07d2c59558
moved eflags computation outside op.c
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4472 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 13:57:33 +00:00
bellard
cad3a37d3e
converted adc, sbb, cmpxchg to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4471 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 13:50:02 +00:00
bellard
b6abf97df1
converted condition code supprot to TCG - converted shift ops to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4470 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 12:44:31 +00:00
bellard
b8b6a50b55
converted more helpers to TCG - fixed some SVM issues
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4459 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-15 16:46:30 +00:00
bellard
044ef8eaa9
i386 specific TODO
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4454 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-13 18:27:16 +00:00
bellard
3bd8c5e4f1
compilation fix
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4449 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 22:55:35 +00:00
bellard
b5b38f61b8
converted more helpers to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4447 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 22:05:13 +00:00
bellard
dbd02bdf79
removed unused code
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4446 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 22:03:14 +00:00
bellard
ba7cd150ff
FPU fixes
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4445 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 20:30:28 +00:00
bellard
19e6c4b8bc
converted x87 FPU ops to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4444 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 19:10:44 +00:00
bellard
5af451868c
converted SSE/MMX ops to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4441 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 16:47:36 +00:00
bellard
8686c490f7
use TCG for MMX/SSE memory accesses
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4439 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 13:55:27 +00:00
bellard
75d28b0595
char is only for strings
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4436 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 12:08:29 +00:00
bellard
edea5f0193
no need to define global registers in cpu-exec.c
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4409 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 11:01:31 +00:00
aurel32
7caa33f7be
Correctly save and restore env->a20_mask now that it is a 64-bit
...
variable. Noticed by Erik de Castro Lopo.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4334 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04 20:11:44 +00:00
aurel32
8dd3dca351
remove target ifdefs from vl.c
...
(Glauber Costa)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4327 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04 13:11:44 +00:00
aurel32
d2856f1ad4
Factorize code in translate.c
...
(Glauber Costa)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4274 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-28 00:32:32 +00:00
aurel32
00f82b8a31
Use correct types to enable > 2G support, based on a patch from
...
Anthony Liguori.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4265 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-27 21:12:55 +00:00
aurel32
a23a663b65
Fix PHYS_ADDR_MASK: upper bits of a PTE are reserved so they are 52 bits
...
long. Thanks to Paul Brook for noticing that.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4242 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-22 21:57:57 +00:00
aurel32
0ba5f006bb
x86/x86-64 MMU PAE fixes
...
This patch fixes MMU emulation in PAE mode for > 4GB physical addresses:
- a20_mask should have the correct size to not clear the high part of
the addresses.
- PHYS_ADDR_MASK should not clear the high part of the addresses.
- pdpe, pde and pte could be located anywhere in memory on x86-64, but
only in the first 4GB on x86, define their pointer to as target_ulong.
- pml4e_addr could be located anywhere in memory, define its pointer
as uint64_t.
- paddr represents a physical address and thus should be of type
target_phys_addr_t.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4239 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-22 20:37:43 +00:00
aurel32
474ea8494a
x86: Introduce CPU_INTERRUPT_NMI
...
(Jan Kiszka)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4205 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-13 16:08:15 +00:00
aurel32
ca10f86763
Remove osdep.c/qemu-img code duplication
...
(Kevin Wolf)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4191 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-11 21:35:42 +00:00
aurel32
1570de2df1
Remove unused phys_ram_base definition from target-i386/helper.c.
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4189 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-11 04:55:24 +00:00
aurel32
e771edab0d
Check for 3DNow! CPUID at translation time
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4184 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-09 06:41:37 +00:00
aurel32
27985df9cc
Fix typo in x86 CPU definitions introduced in r4181
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4183 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-08 20:01:34 +00:00
aurel32
d73bd7ebec
Remove hardcoded values in x86 CPU definitions
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4181 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-08 19:51:36 +00:00
aurel32
a35f3ec76b
3DNow! instruction set emulation
...
(Michael Tross)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4180 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-08 19:51:29 +00:00
aurel32
f94f718195
x86-64: recompute DF after eflags has been modified when emulating SYSCALL
...
(Jakub Jermar)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4120 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-28 22:30:30 +00:00
blueswir1
3f47aa8c37
Fix some functions declared () rather than (void) (Ian Jackson)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4029 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-09 06:59:01 +00:00
blueswir1
f8422f52fd
More helper types, rearrange generic definitions
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3988 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-24 07:45:43 +00:00
pbrook
ac56dd4812
Add TCG variable opaque type.
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3961 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-03 19:56:33 +00:00
balrog
7241f532c3
NMI and INTR events injection should not be handled as software interrupts (Bernhard Kauer).
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3952 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-03 03:26:30 +00:00
balrog
3d575329a5
Make SVM env->cr[8] a valid register (patch from TeLeMan).
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3950 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-03 02:42:36 +00:00
bellard
57fec1fee9
use the TCG code generator
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-01 10:50:11 +00:00
balrog
3e98dc8ec6
Correct the max cpuid level for each x86 cpu model (Dan Kenigsberg).
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3847 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-24 14:04:06 +00:00
balrog
45d242b65b
SVM enabled processor should provide cpuid Fn8000_000A (Bernhard Kauer).
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3844 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-24 13:36:00 +00:00
balrog
71c3558ed2
Fix cmpxchg8b translation (Bernhard Kauer).
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3843 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-24 13:29:55 +00:00