blueswir1
a4e7dd5267
Remove currently unnecessary alignment masking
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4505 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-20 19:36:22 +00:00
blueswir1
77f193daa8
Wrap long lines
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4440 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 16:13:33 +00:00
blueswir1
c2bc0e3880
Remove someexplicit alignment checks (initial patch by Fabrice Bellard)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4431 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-11 19:24:10 +00:00
bellard
7c60cc4bca
suppressed fixed registers
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4408 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 10:58:20 +00:00
blueswir1
22548760ca
Fix compiler warnings
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4404 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 10:12:00 +00:00
blueswir1
64a88d5d3a
CPU feature selection support
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4399 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-09 20:13:43 +00:00
blueswir1
0828b4485a
Move #include to speed up compilation
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4398 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-09 20:12:09 +00:00
blueswir1
7fa76c0bf3
Complete the TCG conversion
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4323 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04 11:58:45 +00:00
blueswir1
4e14008f3a
Revert the previous patch
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4236 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-22 19:05:18 +00:00
blueswir1
25bc827cf2
Move 128-bit float emulation under linux-user
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4234 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-22 16:42:40 +00:00
blueswir1
2b29924f8c
Convert align checks to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4097 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 18:08:59 +00:00
blueswir1
72a9747b79
Convert save, restore, saved, restored, and flushw to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4092 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 17:57:29 +00:00
blueswir1
44e7757c2a
Convert other float and VIS ops to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4091 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-21 17:56:02 +00:00
blueswir1
3b89f26c11
Convert udiv and sdiv ops to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4088 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-18 18:10:42 +00:00
blueswir1
d35527d9f9
Convert CCR and CWP ops to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4086 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-18 18:08:25 +00:00
blueswir1
1f5063fb97
Convert array8/16/32 and alignaddr to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4085 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-18 18:06:54 +00:00
blueswir1
bb5529bb62
Convert ldfsr and stfsr to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4067 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-15 18:11:06 +00:00
blueswir1
375ee38b4b
Convert Sparc64 trap state ops to TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4018 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-05 17:59:48 +00:00
blueswir1
7e8c2b6ca8
Convert float helpers to TCG, fix fabsq in the process
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4014 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-04 20:00:18 +00:00
blueswir1
1a2fb1c009
Modify Sparc32/64 to use TCG
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3989 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-24 14:10:06 +00:00
blueswir1
3deaeab717
Sparc32 MMU register fixes (Robert Reif)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3979 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-11 18:27:33 +00:00
blueswir1
045380be94
More ASIs
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3882 c046a42c-6fe2-441c-8c8c-71466251a162
2008-01-01 17:07:39 +00:00
blueswir1
0b09be2b2f
Nicer debug output for exceptions
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3878 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-30 17:13:01 +00:00
blueswir1
7d85892b9b
Initial support for Sun4d machines (SS-1000, SS-2000)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3869 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-28 20:57:43 +00:00
blueswir1
8543e2cfce
Improved ASI debugging (Robert Reif)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3868 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-28 18:50:23 +00:00
blueswir1
666c87aa3b
Add ASIs (Robert Reif)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3801 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-10 19:58:20 +00:00
blueswir1
9c2b428ee1
Fix compilation and warnings on PPC host
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3746 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-28 18:08:28 +00:00
blueswir1
1f58732916
128-bit float support for user mode
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3740 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-25 18:40:20 +00:00
blueswir1
3dd9a152e1
More MMU registers (Robert Reif)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3738 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-25 12:43:10 +00:00
blueswir1
d07b4d0ea7
Fix MXCC register 64 bit read word order (Robert Reif)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3709 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-19 19:14:10 +00:00
pbrook
87ecb68bdf
Break up vl.h.
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17 17:14:51 +00:00
blueswir1
2761992d13
Remove unnecessary register masking (Robert Reif)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3663 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17 08:21:43 +00:00
blueswir1
bbf7d96b45
Fix MXCC error register (Robert Reif)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3662 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17 08:19:57 +00:00
blueswir1
295db11371
Add MXCC module reset register (Robert Reif)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3661 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17 08:18:59 +00:00
bellard
bd37ec2141
removed warning
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3616 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11 19:50:22 +00:00
blueswir1
6d5f237a59
CPU specific boot mode (Robert Reif)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3542 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-07 17:03:37 +00:00
ths
273af66025
Adjust s390 addresses (the MSB is defined as "to be ignored").
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-29 14:39:49 +00:00
blueswir1
eed152bba5
Use shared ctpop64 helper
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3468 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-28 14:35:04 +00:00
blueswir1
20b749f607
Avoid gcc warnings
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3412 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-20 07:09:08 +00:00
blueswir1
1e64e78d0c
Fix compiling Sparc64 on PPC host
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3411 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-20 07:07:47 +00:00
blueswir1
e909ec2f11
Use ldq and stq for 8 byte accesses (original patch by Robert Reif)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3405 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-17 17:37:13 +00:00
blueswir1
94ced07534
Fix bug in Sparc32 sta op (Robert Reif)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3399 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 20:27:00 +00:00
blueswir1
6f27aba62e
Sparc64 hypervisor mode
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3398 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 17:07:21 +00:00
blueswir1
952a328ff5
SuperSparc MXCC support (Robert Reif)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3397 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 16:29:21 +00:00
j_mayer
6ebbf39000
Replace is_user variable with mmu_idx in softmmu core,
...
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
and using the same definition in code translation code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 07:07:08 +00:00
blueswir1
51996525c7
Fix block load ASIs
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3310 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-01 17:07:58 +00:00
blueswir1
3391c81801
Fix Sparc64 ldfa, lddfa, stfa, and stdfa instructions
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3298 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-30 19:38:12 +00:00
blueswir1
40ce0a9a8f
CPU boot mode
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3231 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-24 19:44:09 +00:00
blueswir1
e32664fbd2
Add missing break statements
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3208 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-23 11:40:57 +00:00
blueswir1
81ad8ba242
Rework ASI instructions (Aurelien Jarno)
...
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3205 c046a42c-6fe2-441c-8c8c-71466251a162
2007-09-21 19:10:53 +00:00