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Konrad Rzeszutek Wilk afa43eb63e i386: define the AMD 'virt-ssbd' CPUID feature bit (CVE-2018-3639) 
AMD Zen expose the Intel equivalant to Speculative Store Bypass Disable
via the 0x80000008_EBX[25] CPUID feature bit.

This needs to be exposed to guest OS to allow them to protect
against CVE-2018-3639.

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20180521215424.13520-3-berrange@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
(cherry picked from commit 403503b162)
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
 		2018-06-20 20:45:07 -05:00
..
alpha x86/cpu/numa queue, 2017-10-27 2017-10-30 10:11:22 +00:00
arm target/arm: Implement v8M VLLDM and VLSTM 2018-06-20 20:45:02 -05:00
cris x86/cpu/numa queue, 2017-10-27 2017-10-30 10:11:22 +00:00
hppa Capstone disassembler 2017-10-27 08:04:51 +01:00
i386 i386: define the AMD 'virt-ssbd' CPUID feature bit (CVE-2018-3639) 2018-06-20 20:45:07 -05:00
lm32 lm32: take BQL before writing IP/IM register 2018-06-20 20:45:03 -05:00
m68k x86/cpu/numa queue, 2017-10-27 2017-10-30 10:11:22 +00:00
microblaze Capstone disassembler 2017-10-27 08:04:51 +01:00
mips x86/cpu/numa queue, 2017-10-27 2017-10-30 10:11:22 +00:00
moxie moxie: cleanup cpu type name composition 2017-10-27 16:03:54 +02:00
nios2 Capstone disassembler 2017-10-27 08:04:51 +01:00
openrisc x86/cpu/numa queue, 2017-10-27 2017-10-30 10:11:22 +00:00
ppc target/ppc: always set PPC_MEM_TLBIE in pre 2.8 migration hack 2018-06-20 20:45:03 -05:00
s390x s390x/kvm: provide stfle.81 2018-01-29 08:33:00 -06:00
sh4 target/sh4: add missing tcg_temp_free() in _decode_opc() 2018-02-11 21:06:46 -06:00
sparc sparc: fix leon3 casa instruction when MMU is disabled 2018-06-20 20:44:58 -05:00
tilegx tcg: Initialize cpu_env generically 2017-10-24 13:53:42 -07:00
tricore x86/cpu/numa queue, 2017-10-27 2017-10-30 10:11:22 +00:00
unicore32 x86/cpu/numa queue, 2017-10-27 2017-10-30 10:11:22 +00:00
xtensa target/xtensa: dump correct physical registers 2018-06-20 20:44:58 -05:00