It is a common thing amongst the various cpu reset functions want to flush the SoftMMU's TLB entries. This is done either by calling tlb_flush directly or by way of a general memset of the CPU structure (sometimes both). This moves the tlb_flush call to the common reset function and additionally ensures it is only done for the CONFIG_SOFTMMU case and when tcg is enabled. In some target cases we add an empty end_of_reset_fields structure to the target vCPU structure so have a clear end point for any memset which is resetting value in the structure before CPU_COMMON (where the TLB structures are). While this is a nice clean-up in general it is also a precursor for changes coming to cputlb for MTTCG where the clearing of entries can't be done arbitrarily across vCPUs. Currently the cpu_reset function is usually called from the context of another vCPU as the architectural power up sequence is run. By using the cputlb API functions we can ensure the right behaviour in the future. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
460 lines
12 KiB
C
460 lines
12 KiB
C
/*
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* QEMU S/390 CPU
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*
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* Copyright (c) 2009 Ulrich Hecht
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* Copyright (c) 2011 Alexander Graf
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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* Copyright (c) 2012 IBM Corp.
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see
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* <http://www.gnu.org/licenses/lgpl-2.1.html>
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* Contributions after 2012-12-11 are licensed under the terms of the
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* GNU GPL, version 2 or (at your option) any later version.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "cpu.h"
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#include "qemu-common.h"
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#include "qemu/cutils.h"
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#include "qemu/timer.h"
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#include "qemu/error-report.h"
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#include "trace.h"
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#include "qapi/visitor.h"
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#include "migration/vmstate.h"
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#include "exec/exec-all.h"
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#ifndef CONFIG_USER_ONLY
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#include "hw/hw.h"
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#include "sysemu/arch_init.h"
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#include "sysemu/sysemu.h"
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#include "hw/s390x/sclp.h"
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#endif
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#define CR0_RESET 0xE0UL
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#define CR14_RESET 0xC2000000UL;
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static void s390_cpu_set_pc(CPUState *cs, vaddr value)
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{
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S390CPU *cpu = S390_CPU(cs);
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cpu->env.psw.addr = value;
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}
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static bool s390_cpu_has_work(CPUState *cs)
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{
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S390CPU *cpu = S390_CPU(cs);
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CPUS390XState *env = &cpu->env;
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return (cs->interrupt_request & CPU_INTERRUPT_HARD) &&
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(env->psw.mask & PSW_MASK_EXT);
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}
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#if !defined(CONFIG_USER_ONLY)
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/* S390CPUClass::load_normal() */
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static void s390_cpu_load_normal(CPUState *s)
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{
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S390CPU *cpu = S390_CPU(s);
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cpu->env.psw.addr = ldl_phys(s->as, 4) & PSW_MASK_ESA_ADDR;
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cpu->env.psw.mask = PSW_MASK_32 | PSW_MASK_64;
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s390_cpu_set_state(CPU_STATE_OPERATING, cpu);
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}
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#endif
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/* S390CPUClass::cpu_reset() */
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static void s390_cpu_reset(CPUState *s)
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{
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S390CPU *cpu = S390_CPU(s);
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S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
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CPUS390XState *env = &cpu->env;
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env->pfault_token = -1UL;
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scc->parent_reset(s);
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cpu->env.sigp_order = 0;
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s390_cpu_set_state(CPU_STATE_STOPPED, cpu);
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}
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/* S390CPUClass::initial_reset() */
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static void s390_cpu_initial_reset(CPUState *s)
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{
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S390CPU *cpu = S390_CPU(s);
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CPUS390XState *env = &cpu->env;
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int i;
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s390_cpu_reset(s);
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/* initial reset does not touch regs,fregs and aregs */
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memset(&env->fpc, 0, offsetof(CPUS390XState, end_reset_fields) -
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offsetof(CPUS390XState, fpc));
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/* architectured initial values for CR 0 and 14 */
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env->cregs[0] = CR0_RESET;
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env->cregs[14] = CR14_RESET;
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/* architectured initial value for Breaking-Event-Address register */
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env->gbea = 1;
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env->pfault_token = -1UL;
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env->ext_index = -1;
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for (i = 0; i < ARRAY_SIZE(env->io_index); i++) {
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env->io_index[i] = -1;
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}
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/* tininess for underflow is detected before rounding */
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set_float_detect_tininess(float_tininess_before_rounding,
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&env->fpu_status);
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/* Reset state inside the kernel that we cannot access yet from QEMU. */
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if (kvm_enabled()) {
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kvm_s390_reset_vcpu(cpu);
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}
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}
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/* CPUClass:reset() */
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static void s390_cpu_full_reset(CPUState *s)
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{
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S390CPU *cpu = S390_CPU(s);
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S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
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CPUS390XState *env = &cpu->env;
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int i;
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scc->parent_reset(s);
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cpu->env.sigp_order = 0;
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s390_cpu_set_state(CPU_STATE_STOPPED, cpu);
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memset(env, 0, offsetof(CPUS390XState, end_reset_fields));
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/* architectured initial values for CR 0 and 14 */
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env->cregs[0] = CR0_RESET;
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env->cregs[14] = CR14_RESET;
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/* architectured initial value for Breaking-Event-Address register */
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env->gbea = 1;
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env->pfault_token = -1UL;
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env->ext_index = -1;
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for (i = 0; i < ARRAY_SIZE(env->io_index); i++) {
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env->io_index[i] = -1;
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}
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/* tininess for underflow is detected before rounding */
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set_float_detect_tininess(float_tininess_before_rounding,
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&env->fpu_status);
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/* Reset state inside the kernel that we cannot access yet from QEMU. */
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if (kvm_enabled()) {
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kvm_s390_reset_vcpu(cpu);
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}
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}
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#if !defined(CONFIG_USER_ONLY)
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static void s390_cpu_machine_reset_cb(void *opaque)
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{
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S390CPU *cpu = opaque;
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run_on_cpu(CPU(cpu), s390_do_cpu_full_reset, RUN_ON_CPU_NULL);
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}
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#endif
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static void s390_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
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{
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info->mach = bfd_mach_s390_64;
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info->print_insn = print_insn_s390;
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}
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static void s390_cpu_realizefn(DeviceState *dev, Error **errp)
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{
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CPUState *cs = CPU(dev);
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S390CPUClass *scc = S390_CPU_GET_CLASS(dev);
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S390CPU *cpu = S390_CPU(dev);
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CPUS390XState *env = &cpu->env;
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Error *err = NULL;
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/* the model has to be realized before qemu_init_vcpu() due to kvm */
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s390_realize_cpu_model(cs, &err);
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if (err) {
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goto out;
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}
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#if !defined(CONFIG_USER_ONLY)
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if (cpu->id >= max_cpus) {
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error_setg(&err, "Unable to add CPU: %" PRIi64
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", max allowed: %d", cpu->id, max_cpus - 1);
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goto out;
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}
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#endif
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if (cpu_exists(cpu->id)) {
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error_setg(&err, "Unable to add CPU: %" PRIi64
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", it already exists", cpu->id);
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goto out;
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}
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if (cpu->id != scc->next_cpu_id) {
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error_setg(&err, "Unable to add CPU: %" PRIi64
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", The next available id is %" PRIi64, cpu->id,
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scc->next_cpu_id);
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goto out;
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}
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cpu_exec_realizefn(cs, &err);
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if (err != NULL) {
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goto out;
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}
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scc->next_cpu_id++;
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#if !defined(CONFIG_USER_ONLY)
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qemu_register_reset(s390_cpu_machine_reset_cb, cpu);
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#endif
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env->cpu_num = cpu->id;
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s390_cpu_gdb_init(cs);
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qemu_init_vcpu(cs);
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#if !defined(CONFIG_USER_ONLY)
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run_on_cpu(cs, s390_do_cpu_full_reset, RUN_ON_CPU_NULL);
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#else
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cpu_reset(cs);
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#endif
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scc->parent_realize(dev, &err);
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#if !defined(CONFIG_USER_ONLY)
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if (dev->hotplugged) {
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raise_irq_cpu_hotplug();
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}
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#endif
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out:
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error_propagate(errp, err);
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}
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static void s390x_cpu_get_id(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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S390CPU *cpu = S390_CPU(obj);
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int64_t value = cpu->id;
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visit_type_int(v, name, &value, errp);
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}
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static void s390x_cpu_set_id(Object *obj, Visitor *v, const char *name,
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void *opaque, Error **errp)
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{
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S390CPU *cpu = S390_CPU(obj);
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DeviceState *dev = DEVICE(obj);
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const int64_t min = 0;
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const int64_t max = UINT32_MAX;
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Error *err = NULL;
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int64_t value;
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if (dev->realized) {
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error_setg(errp, "Attempt to set property '%s' on '%s' after "
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"it was realized", name, object_get_typename(obj));
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return;
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}
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visit_type_int(v, name, &value, &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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if (value < min || value > max) {
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error_setg(errp, "Property %s.%s doesn't take value %" PRId64
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" (minimum: %" PRId64 ", maximum: %" PRId64 ")" ,
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object_get_typename(obj), name, value, min, max);
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return;
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}
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cpu->id = value;
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}
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static void s390_cpu_initfn(Object *obj)
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{
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CPUState *cs = CPU(obj);
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S390CPU *cpu = S390_CPU(obj);
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CPUS390XState *env = &cpu->env;
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static bool inited;
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#if !defined(CONFIG_USER_ONLY)
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struct tm tm;
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#endif
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cs->env_ptr = env;
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cs->halted = 1;
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cs->exception_index = EXCP_HLT;
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object_property_add(OBJECT(cpu), "id", "int64_t", s390x_cpu_get_id,
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s390x_cpu_set_id, NULL, NULL, NULL);
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s390_cpu_model_register_props(obj);
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#if !defined(CONFIG_USER_ONLY)
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qemu_get_timedate(&tm, 0);
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env->tod_offset = TOD_UNIX_EPOCH +
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(time2tod(mktimegm(&tm)) * 1000000000ULL);
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env->tod_basetime = 0;
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env->tod_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_tod_timer, cpu);
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env->cpu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_cpu_timer, cpu);
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s390_cpu_set_state(CPU_STATE_STOPPED, cpu);
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#endif
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if (tcg_enabled() && !inited) {
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inited = true;
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s390x_translate_init();
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}
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}
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static void s390_cpu_finalize(Object *obj)
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{
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#if !defined(CONFIG_USER_ONLY)
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S390CPU *cpu = S390_CPU(obj);
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qemu_unregister_reset(s390_cpu_machine_reset_cb, cpu);
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g_free(cpu->irqstate);
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#endif
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}
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#if !defined(CONFIG_USER_ONLY)
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static bool disabled_wait(CPUState *cpu)
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{
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return cpu->halted && !(S390_CPU(cpu)->env.psw.mask &
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(PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK));
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}
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static unsigned s390_count_running_cpus(void)
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{
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CPUState *cpu;
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int nr_running = 0;
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CPU_FOREACH(cpu) {
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uint8_t state = S390_CPU(cpu)->env.cpu_state;
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if (state == CPU_STATE_OPERATING ||
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state == CPU_STATE_LOAD) {
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if (!disabled_wait(cpu)) {
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nr_running++;
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}
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}
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}
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return nr_running;
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}
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unsigned int s390_cpu_halt(S390CPU *cpu)
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{
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CPUState *cs = CPU(cpu);
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trace_cpu_halt(cs->cpu_index);
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if (!cs->halted) {
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cs->halted = 1;
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cs->exception_index = EXCP_HLT;
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}
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return s390_count_running_cpus();
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}
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void s390_cpu_unhalt(S390CPU *cpu)
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{
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CPUState *cs = CPU(cpu);
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trace_cpu_unhalt(cs->cpu_index);
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if (cs->halted) {
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cs->halted = 0;
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cs->exception_index = -1;
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}
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}
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unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu)
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{
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trace_cpu_set_state(CPU(cpu)->cpu_index, cpu_state);
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switch (cpu_state) {
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case CPU_STATE_STOPPED:
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case CPU_STATE_CHECK_STOP:
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/* halt the cpu for common infrastructure */
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s390_cpu_halt(cpu);
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break;
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case CPU_STATE_OPERATING:
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case CPU_STATE_LOAD:
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/* unhalt the cpu for common infrastructure */
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s390_cpu_unhalt(cpu);
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break;
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default:
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error_report("Requested CPU state is not a valid S390 CPU state: %u",
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cpu_state);
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exit(1);
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}
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if (kvm_enabled() && cpu->env.cpu_state != cpu_state) {
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kvm_s390_set_cpu_state(cpu, cpu_state);
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}
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cpu->env.cpu_state = cpu_state;
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return s390_count_running_cpus();
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}
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#endif
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static gchar *s390_gdb_arch_name(CPUState *cs)
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{
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return g_strdup("s390:64-bit");
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}
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static void s390_cpu_class_init(ObjectClass *oc, void *data)
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{
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S390CPUClass *scc = S390_CPU_CLASS(oc);
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CPUClass *cc = CPU_CLASS(scc);
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DeviceClass *dc = DEVICE_CLASS(oc);
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scc->next_cpu_id = 0;
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scc->parent_realize = dc->realize;
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dc->realize = s390_cpu_realizefn;
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scc->parent_reset = cc->reset;
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#if !defined(CONFIG_USER_ONLY)
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scc->load_normal = s390_cpu_load_normal;
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#endif
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scc->cpu_reset = s390_cpu_reset;
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scc->initial_cpu_reset = s390_cpu_initial_reset;
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cc->reset = s390_cpu_full_reset;
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cc->class_by_name = s390_cpu_class_by_name,
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cc->has_work = s390_cpu_has_work;
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cc->do_interrupt = s390_cpu_do_interrupt;
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cc->dump_state = s390_cpu_dump_state;
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cc->set_pc = s390_cpu_set_pc;
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cc->gdb_read_register = s390_cpu_gdb_read_register;
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cc->gdb_write_register = s390_cpu_gdb_write_register;
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#ifdef CONFIG_USER_ONLY
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cc->handle_mmu_fault = s390_cpu_handle_mmu_fault;
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#else
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cc->get_phys_page_debug = s390_cpu_get_phys_page_debug;
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cc->vmsd = &vmstate_s390_cpu;
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cc->write_elf64_note = s390_cpu_write_elf64_note;
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cc->cpu_exec_interrupt = s390_cpu_exec_interrupt;
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cc->debug_excp_handler = s390x_cpu_debug_excp_handler;
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#endif
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cc->disas_set_info = s390_cpu_disas_set_info;
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cc->gdb_num_core_regs = S390_NUM_CORE_REGS;
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cc->gdb_core_xml_file = "s390x-core64.xml";
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cc->gdb_arch_name = s390_gdb_arch_name;
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s390_cpu_model_class_register_props(oc);
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}
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static const TypeInfo s390_cpu_type_info = {
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.name = TYPE_S390_CPU,
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.parent = TYPE_CPU,
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.instance_size = sizeof(S390CPU),
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.instance_init = s390_cpu_initfn,
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.instance_finalize = s390_cpu_finalize,
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.abstract = true,
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.class_size = sizeof(S390CPUClass),
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.class_init = s390_cpu_class_init,
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};
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static void s390_cpu_register_types(void)
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{
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type_register_static(&s390_cpu_type_info);
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}
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type_init(s390_cpu_register_types)
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