03a31776e8
Writes in PIO mode have two requirements: - A data interrupt must be generated after a write command has been issued to indicate that the chip is ready to receive data. - A block interrupt must be generated after each block to indicate that the chip is ready to receive the next data block. Rearrange the code to make this happen. Tested on raspi3 (in PIO mode) and raspi2 (in DMA mode). Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 1531779837-20557-1-git-send-email-linux@roeck-us.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| .. | ||
| bcm2835_sdhost.c | ||
| core.c | ||
| Makefile.objs | ||
| milkymist-memcard.c | ||
| omap_mmc.c | ||
| pl181.c | ||
| pxa2xx_mmci.c | ||
| sd.c | ||
| sdhci-internal.h | ||
| sdhci.c | ||
| sdmmc-internal.c | ||
| sdmmc-internal.h | ||
| ssi-sd.c | ||
| trace-events | ||