qemu-patch-raspberry4/include/hw/i386
Eduardo Habkost 0909ad24b2 target-i386: Remove SSE4a from qemu64 CPU model
SSE4a is not available in any Intel CPU, and we want to make the default
CPU runnable in most hosts, so it doesn't make sense to enable it by
default in KVM mode.

We should eventually have all features supported by TCG enabled by
default in TCG mode, but as we don't have a good mechanism today to
ensure we have different defaults in KVM and TCG mode, disable SSE4a in
the qemu64 CPU model entirely.

Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2015-11-05 16:27:59 -02:00
..
apic-msidef.h hw: move headers to include/ 2013-04-08 18:13:10 +02:00
apic.h target-i386: clear bsp bit when designating bsp 2015-04-02 15:57:27 +02:00
apic_internal.h cpu/apic: drop icc bus/bridge 2015-10-02 16:22:02 -03:00
ich9.h ich9: implement strap SPKR pin logic 2015-07-08 10:09:55 +03:00
intel_iommu.h intel_iommu: Add support for translation for devices behind bridges 2015-10-18 10:05:43 +03:00
ioapic.h pc: move IO_APIC_DEFAULT_ADDRESS to include/hw/i386/ioapic.h 2013-07-29 19:33:32 -05:00
ioapic_internal.h hmp: added io apic dump state 2015-09-25 12:04:42 +02:00
pc.h target-i386: Remove SSE4a from qemu64 CPU model 2015-11-05 16:27:59 -02:00
topology.h cpu: Introduce X86CPUTopoInfo structure for argument simplification 2015-10-02 16:22:01 -03:00