0a31c16c9c
The #ifdef'ry hides that the user-mode implementation of mips_cpu_do_interrupt() simply sets exception_index = EXCP_NONE. Add this simple implementation to tcg/user/tlb_helper.c, and the corresponding Meson machinery to build this file when user emulation is configured. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210428170410.479308-14-f4bug@amsat.org>
60 lines
1.5 KiB
Meson
60 lines
1.5 KiB
Meson
gen = [
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decodetree.process('mips32r6.decode', extra_args: '--static-decode=decode_mips32r6'),
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decodetree.process('mips64r6.decode', extra_args: '--static-decode=decode_mips64r6'),
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decodetree.process('msa32.decode', extra_args: '--static-decode=decode_msa32'),
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decodetree.process('msa64.decode', extra_args: '--static-decode=decode_msa64'),
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decodetree.process('tx79.decode', extra_args: '--static-decode=decode_tx79'),
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]
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mips_user_ss = ss.source_set()
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mips_ss = ss.source_set()
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mips_ss.add(files(
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'cpu.c',
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'fpu.c',
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'gdbstub.c',
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'msa.c',
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))
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mips_tcg_ss = ss.source_set()
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mips_tcg_ss.add(gen)
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mips_tcg_ss.add(files(
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'dsp_helper.c',
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'fpu_helper.c',
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'ldst_helper.c',
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'lmmi_helper.c',
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'msa_helper.c',
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'msa_translate.c',
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'op_helper.c',
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'rel6_translate.c',
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'tlb_helper.c',
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'translate.c',
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'translate_addr_const.c',
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'txx9_translate.c',
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))
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mips_tcg_ss.add(when: 'TARGET_MIPS64', if_true: files(
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'tx79_translate.c',
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), if_false: files(
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'mxu_translate.c',
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))
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if 'CONFIG_TCG' in config_all
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subdir('tcg')
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endif
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mips_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'))
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mips_softmmu_ss = ss.source_set()
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mips_softmmu_ss.add(files(
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'addr.c',
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'cp0_timer.c',
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'machine.c',
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))
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mips_softmmu_ss.add(when: 'CONFIG_TCG', if_true: files(
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'cp0_helper.c',
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'mips-semi.c',
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))
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mips_ss.add_all(when: 'CONFIG_TCG', if_true: [mips_tcg_ss])
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target_arch += {'mips': mips_ss}
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target_softmmu_arch += {'mips': mips_softmmu_ss}
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target_user_arch += {'mips': mips_user_ss}
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