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qemu-patch-raspberry4/target/hexagon/imported
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Taylor Simpson 0d0b91a804 Hexagon (target/hexagon) load and unpack bytes instructions 
The following instructions are added
    L2_loadbzw2_io          Rd32 = memubh(Rs32+#s11:1)
    L2_loadbzw4_io          Rdd32 = memubh(Rs32+#s11:1)
    L2_loadbsw2_io          Rd32 = membh(Rs32+#s11:1)
    L2_loadbsw4_io          Rdd32 = membh(Rs32+#s11:1)

    L4_loadbzw2_ur          Rd32 = memubh(Rt32<<#u2+#U6)
    L4_loadbzw4_ur          Rdd32 = memubh(Rt32<<#u2+#U6)
    L4_loadbsw2_ur          Rd32 = membh(Rt32<<#u2+#U6)
    L4_loadbsw4_ur          Rdd32 = membh(Rt32<<#u2+#U6)

    L4_loadbzw2_ap          Rd32 = memubh(Re32=#U6)
    L4_loadbzw4_ap          Rdd32 = memubh(Re32=#U6)
    L4_loadbsw2_ap          Rd32 = membh(Re32=#U6)
    L4_loadbsw4_ap          Rdd32 = membh(Re32=#U6)

    L2_loadbzw2_pr          Rd32 = memubh(Rx32++Mu2)
    L2_loadbzw4_pr          Rdd32 = memubh(Rx32++Mu2)
    L2_loadbsw2_pr          Rd32 = membh(Rx32++Mu2)
    L2_loadbsw4_pr          Rdd32 = membh(Rx32++Mu2)

    L2_loadbzw2_pbr         Rd32 = memubh(Rx32++Mu2:brev)
    L2_loadbzw4_pbr         Rdd32 = memubh(Rx32++Mu2:brev)
    L2_loadbsw2_pbr         Rd32 = membh(Rx32++Mu2:brev)
    L2_loadbsw4_pbr         Rdd32 = membh(Rx32++Mu2:brev)

    L2_loadbzw2_pi          Rd32 = memubh(Rx32++#s4:1)
    L2_loadbzw4_pi          Rdd32 = memubh(Rx32++#s4:1)
    L2_loadbsw2_pi          Rd32 = membh(Rx32++#s4:1)
    L2_loadbsw4_pi          Rdd32 = membh(Rx32++#s4:1)

    L2_loadbzw2_pci         Rd32 = memubh(Rx32++#s4:1:circ(Mu2))
    L2_loadbzw4_pci         Rdd32 = memubh(Rx32++#s4:1:circ(Mu2))
    L2_loadbsw2_pci         Rd32 = membh(Rx32++#s4:1:circ(Mu2))
    L2_loadbsw4_pci         Rdd32 = membh(Rx32++#s4:1:circ(Mu2))

    L2_loadbzw2_pcr         Rd32 = memubh(Rx32++I:circ(Mu2))
    L2_loadbzw4_pcr         Rdd32 = memubh(Rx32++I:circ(Mu2))
    L2_loadbsw2_pcr         Rd32 = membh(Rx32++I:circ(Mu2))
    L2_loadbsw4_pcr         Rdd32 = membh(Rx32++I:circ(Mu2))

Test cases in tests/tcg/hexagon/load_unpack.c

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1617930474-31979-25-git-send-email-tsimpson@quicinc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-01 16:06:09 -07:00
..
allidefs.def Hexagon (target/hexagon/imported) arch import 2021-02-18 07:48:22 -08:00
alu.idef Hexagon (target/hexagon) add A4_addp_c/A4_subp_c 2021-05-01 08:31:43 -07:00
branch.idef Hexagon (target/hexagon/imported) arch import 2021-02-18 07:48:22 -08:00
compare.idef Hexagon (target/hexagon) cleanup ternary operators in semantics 2021-05-01 08:31:43 -07:00
encode.def Hexagon (target/hexagon/imported) arch import 2021-02-18 07:48:22 -08:00
encode_pp.def Hexagon (target/hexagon) load and unpack bytes instructions 2021-05-01 16:06:09 -07:00
encode_subinsn.def Hexagon (target/hexagon/imported) arch import 2021-02-18 07:48:22 -08:00
float.idef Hexagon (target/hexagon) add F2_sfinvsqrta 2021-05-01 08:31:43 -07:00
iclass.def Hexagon (target/hexagon) instruction classes 2021-02-18 07:48:22 -08:00
ldst.idef Hexagon (target/hexagon) load and unpack bytes instructions 2021-05-01 16:06:09 -07:00
macros.def Hexagon (target/hexagon) bit reverse (brev) addressing 2021-05-01 16:03:10 -07:00
mpy.idef Hexagon (target/hexagon/imported) arch import 2021-02-18 07:48:22 -08:00
shift.idef Hexagon (target/hexagon/imported) arch import 2021-02-18 07:48:22 -08:00
subinsns.idef Hexagon (target/hexagon/imported) arch import 2021-02-18 07:48:22 -08:00
system.idef Hexagon (target/hexagon/imported) arch import 2021-02-18 07:48:22 -08:00