0fd3ca30c4
Trivial patch adding CPU listing and the ability to do per-subtype CVR/PVR/PRR values. Presently SH7750R and SH7751R definitions are provided, as these are the ones in present use in-tree. The CVR value for SH7751R is intentionally restricted so the kernel boots, though this will want to be switched to the proper CVR value once system emulation has sufficiently stabilized. This also makes it trivial to abstract subtype specific registers like MMU_PTEA and to set up feature bits in line with the kernel probing for things like conditionalizing FPU/DSP context. Signed-off-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5133 c046a42c-6fe2-441c-8c8c-71466251a162
75 lines
2.4 KiB
C
75 lines
2.4 KiB
C
/*
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* Renesas SH7751R R2D-PLUS emulation
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*
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* Copyright (c) 2007 Magnus Damm
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "hw.h"
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#include "sh.h"
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#include "sysemu.h"
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#include "boards.h"
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#define SDRAM_BASE 0x0c000000 /* Physical location of SDRAM: Area 3 */
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#define SDRAM_SIZE 0x04000000
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static void r2d_init(ram_addr_t ram_size, int vga_ram_size,
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const char *boot_device, DisplayState * ds,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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{
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CPUState *env;
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struct SH7750State *s;
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if (!cpu_model)
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cpu_model = "SH7751R";
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env = cpu_init(cpu_model);
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if (!env) {
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fprintf(stderr, "Unable to find CPU definition\n");
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exit(1);
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}
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/* Allocate memory space */
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cpu_register_physical_memory(SDRAM_BASE, SDRAM_SIZE, 0);
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/* Register peripherals */
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s = sh7750_init(env);
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/* Todo: register on board registers */
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{
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int kernel_size;
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kernel_size = load_image(kernel_filename, phys_ram_base);
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if (kernel_size < 0) {
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fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename);
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exit(1);
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}
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env->pc = SDRAM_BASE | 0xa0000000; /* Start from P2 area */
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}
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}
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QEMUMachine r2d_machine = {
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"r2d",
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"r2d-plus board",
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r2d_init,
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SDRAM_SIZE | RAMSIZE_FIXED
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};
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