This prevents a load reservation from being placed in one context/process, then being used in another, resulting in an SC succeeding incorrectly and breaking atomics. Signed-off-by: Joel Sing <joel@sing.id.au> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> |
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trans_privileged.inc.c | ||
trans_rva.inc.c | ||
trans_rvd.inc.c | ||
trans_rvf.inc.c | ||
trans_rvi.inc.c | ||
trans_rvm.inc.c |