0b8ceee822
The SSE-300 includes some timers which are a different kind to those in the SSE-200. Model them. These timers are documented in the SSE-123 Example Subsystem Technical Reference Manual: https://developer.arm.com/documentation/101370/latest/ Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210219144617.4782-13-peter.maydell@linaro.org
54 lines
1.3 KiB
C
54 lines
1.3 KiB
C
/*
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* Arm SSE Subsystem System Timer
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*
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* Copyright (c) 2020 Linaro Limited
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* Written by Peter Maydell
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 or
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* (at your option) any later version.
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*/
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/*
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* This is a model of the "System timer" which is documented in
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* the Arm SSE-123 Example Subsystem Technical Reference Manual:
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* https://developer.arm.com/documentation/101370/latest/
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*
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* QEMU interface:
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* + QOM property "counter": link property to be set to the
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* TYPE_SSE_COUNTER timestamp counter device this timer runs off
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* + sysbus MMIO region 0: the register bank
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* + sysbus IRQ 0: timer interrupt
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*/
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#ifndef SSE_TIMER_H
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#define SSE_TIMER_H
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#include "hw/sysbus.h"
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#include "qom/object.h"
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#include "hw/timer/sse-counter.h"
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#define TYPE_SSE_TIMER "sse-timer"
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OBJECT_DECLARE_SIMPLE_TYPE(SSETimer, SSE_TIMER)
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struct SSETimer {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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MemoryRegion iomem;
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qemu_irq irq;
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SSECounter *counter;
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QEMUTimer timer;
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Notifier counter_notifier;
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uint32_t cntfrq;
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uint32_t cntp_ctl;
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uint64_t cntp_cval;
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uint64_t cntp_aival;
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uint32_t cntp_aival_ctl;
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uint32_t cntp_aival_reload;
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};
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#endif
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