For testing, it can be useful to simulate an enormous amount of memory (e.g. 2^64 RAM). This adds an MMIO device that acts as sparse memory. When something writes a nonzero value to a sparse-mem address, we allocate a block of memory. For now, since the only user of this device is the fuzzer, we do not track and free zeroed blocks. The device has a very low priority (so it can be mapped beneath actual RAM, and virtual device MMIO regions). Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
152 lines
4.2 KiB
C
152 lines
4.2 KiB
C
/*
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* A sparse memory device. Useful for fuzzing
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*
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* Copyright Red Hat Inc., 2021
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*
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* Authors:
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* Alexander Bulekov <alxndr@bu.edu>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "exec/address-spaces.h"
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#include "hw/qdev-properties.h"
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#include "hw/sysbus.h"
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#include "qapi/error.h"
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#include "qemu/units.h"
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#include "sysemu/qtest.h"
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#include "hw/mem/sparse-mem.h"
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#define SPARSE_MEM(obj) OBJECT_CHECK(SparseMemState, (obj), TYPE_SPARSE_MEM)
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#define SPARSE_BLOCK_SIZE 0x1000
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typedef struct SparseMemState {
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SysBusDevice parent_obj;
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MemoryRegion mmio;
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uint64_t baseaddr;
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uint64_t length;
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uint64_t size_used;
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uint64_t maxsize;
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GHashTable *mapped;
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} SparseMemState;
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typedef struct sparse_mem_block {
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uint8_t data[SPARSE_BLOCK_SIZE];
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} sparse_mem_block;
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static uint64_t sparse_mem_read(void *opaque, hwaddr addr, unsigned int size)
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{
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SparseMemState *s = opaque;
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uint64_t ret = 0;
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size_t pfn = addr / SPARSE_BLOCK_SIZE;
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size_t offset = addr % SPARSE_BLOCK_SIZE;
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sparse_mem_block *block;
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block = g_hash_table_lookup(s->mapped, (void *)pfn);
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if (block) {
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assert(offset + size <= sizeof(block->data));
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memcpy(&ret, block->data + offset, size);
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}
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return ret;
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}
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static void sparse_mem_write(void *opaque, hwaddr addr, uint64_t v,
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unsigned int size)
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{
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SparseMemState *s = opaque;
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size_t pfn = addr / SPARSE_BLOCK_SIZE;
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size_t offset = addr % SPARSE_BLOCK_SIZE;
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sparse_mem_block *block;
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if (!g_hash_table_lookup(s->mapped, (void *)pfn) &&
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s->size_used + SPARSE_BLOCK_SIZE < s->maxsize && v) {
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g_hash_table_insert(s->mapped, (void *)pfn,
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g_new0(sparse_mem_block, 1));
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s->size_used += sizeof(block->data);
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}
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block = g_hash_table_lookup(s->mapped, (void *)pfn);
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if (!block) {
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return;
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}
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assert(offset + size <= sizeof(block->data));
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memcpy(block->data + offset, &v, size);
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}
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static const MemoryRegionOps sparse_mem_ops = {
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.read = sparse_mem_read,
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.write = sparse_mem_write,
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.endianness = DEVICE_LITTLE_ENDIAN,
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.valid = {
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.min_access_size = 1,
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.max_access_size = 8,
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.unaligned = false,
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},
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};
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static Property sparse_mem_properties[] = {
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/* The base address of the memory */
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DEFINE_PROP_UINT64("baseaddr", SparseMemState, baseaddr, 0x0),
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/* The length of the sparse memory region */
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DEFINE_PROP_UINT64("length", SparseMemState, length, UINT64_MAX),
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/* Max amount of actual memory that can be used to back the sparse memory */
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DEFINE_PROP_UINT64("maxsize", SparseMemState, maxsize, 10 * MiB),
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DEFINE_PROP_END_OF_LIST(),
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};
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MemoryRegion *sparse_mem_init(uint64_t addr, uint64_t length)
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{
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DeviceState *dev;
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dev = qdev_new(TYPE_SPARSE_MEM);
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qdev_prop_set_uint64(dev, "baseaddr", addr);
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qdev_prop_set_uint64(dev, "length", length);
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sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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sysbus_mmio_map_overlap(SYS_BUS_DEVICE(dev), 0, addr, -10000);
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return &SPARSE_MEM(dev)->mmio;
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}
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static void sparse_mem_realize(DeviceState *dev, Error **errp)
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{
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SparseMemState *s = SPARSE_MEM(dev);
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SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
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if (!qtest_enabled()) {
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error_setg(errp, "sparse_mem device should only be used "
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"for testing with QTest");
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return;
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}
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assert(s->baseaddr + s->length > s->baseaddr);
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s->mapped = g_hash_table_new(NULL, NULL);
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memory_region_init_io(&s->mmio, OBJECT(s), &sparse_mem_ops, s,
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"sparse-mem", s->length);
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sysbus_init_mmio(sbd, &s->mmio);
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}
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static void sparse_mem_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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device_class_set_props(dc, sparse_mem_properties);
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dc->desc = "Sparse Memory Device";
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dc->realize = sparse_mem_realize;
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}
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static const TypeInfo sparse_mem_types[] = {
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{
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.name = TYPE_SPARSE_MEM,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(SparseMemState),
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.class_init = sparse_mem_class_init,
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},
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};
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DEFINE_TYPES(sparse_mem_types);
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