qemu-patch-raspberry4/target/sparc
Artyom Tarasenko 1a2aefae66
target-sparc: on UA2005 don't deliver Interrupt_level_n IRQs in hypervisor mode
As described in Chapter 5.7.6 of the UltraSPARC Architecture 2005,
outstanding disrupting exceptions that are destined for privileged mode can only
cause a trap when the virtual processor is in nonprivileged or privileged mode and
PSTATE.ie = 1. At all other times, they are held pending.

Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
2017-01-18 22:03:44 +01:00
..
asi.h
cc_helper.c
cpu-qom.h
cpu.c qom/cpu: move tlb_flush to cpu_common_reset 2017-01-13 14:24:31 +00:00
cpu.h target-sparc: on UA2005 don't deliver Interrupt_level_n IRQs in hypervisor mode 2017-01-18 22:03:44 +01:00
fop_helper.c
gdbstub.c
helper.c
helper.h
int32_helper.c
int64_helper.c
ldst_helper.c target-sparc: use explicit mmu register pointers 2017-01-18 22:03:44 +01:00
machine.c
Makefile.objs
mmu_helper.c
monitor.c
TODO
trace-events
translate.c target-sparc: store cpu super- and hypervisor flags in TB 2017-01-18 22:03:44 +01:00
vis_helper.c
win_helper.c