With the previous changes, we can now let the ICS_KVM class inherit directly from ICS_BASE class and not from the intermediate ICS_SIMPLE. It makes the class hierarchy much cleaner. What is left in the top classes is the low level interface to access the KVM XICS device in ICS_KVM and the XICS emulating handlers in ICS_SIMPLE. This should not break migration compatibility. Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
460 lines
13 KiB
C
460 lines
13 KiB
C
/*
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* QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
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*
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* PAPR Virtualized Interrupt System, aka ICS/ICP aka xics, in-kernel emulation
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*
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* Copyright (c) 2013 David Gibson, IBM Corporation.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qemu-common.h"
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#include "cpu.h"
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#include "hw/hw.h"
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#include "trace.h"
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#include "sysemu/kvm.h"
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#include "hw/ppc/spapr.h"
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#include "hw/ppc/xics.h"
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#include "kvm_ppc.h"
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#include "qemu/config-file.h"
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#include "qemu/error-report.h"
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#include <sys/ioctl.h>
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static int kernel_xics_fd = -1;
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typedef struct KVMEnabledICP {
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unsigned long vcpu_id;
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QLIST_ENTRY(KVMEnabledICP) node;
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} KVMEnabledICP;
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static QLIST_HEAD(, KVMEnabledICP)
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kvm_enabled_icps = QLIST_HEAD_INITIALIZER(&kvm_enabled_icps);
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/*
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* ICP-KVM
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*/
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static void icp_get_kvm_state(ICPState *icp)
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{
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uint64_t state;
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int ret;
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/* ICP for this CPU thread is not in use, exiting */
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if (!icp->cs) {
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return;
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}
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ret = kvm_get_one_reg(icp->cs, KVM_REG_PPC_ICP_STATE, &state);
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if (ret != 0) {
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error_report("Unable to retrieve KVM interrupt controller state"
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" for CPU %ld: %s", kvm_arch_vcpu_id(icp->cs), strerror(errno));
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exit(1);
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}
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icp->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT;
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icp->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT)
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& KVM_REG_PPC_ICP_MFRR_MASK;
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icp->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT)
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& KVM_REG_PPC_ICP_PPRI_MASK;
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}
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static void do_icp_synchronize_state(CPUState *cpu, run_on_cpu_data arg)
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{
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icp_get_kvm_state(arg.host_ptr);
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}
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static void icp_synchronize_state(ICPState *icp)
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{
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if (icp->cs) {
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run_on_cpu(icp->cs, do_icp_synchronize_state, RUN_ON_CPU_HOST_PTR(icp));
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}
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}
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static int icp_set_kvm_state(ICPState *icp, int version_id)
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{
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uint64_t state;
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int ret;
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/* ICP for this CPU thread is not in use, exiting */
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if (!icp->cs) {
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return 0;
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}
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state = ((uint64_t)icp->xirr << KVM_REG_PPC_ICP_XISR_SHIFT)
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| ((uint64_t)icp->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT)
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| ((uint64_t)icp->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT);
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ret = kvm_set_one_reg(icp->cs, KVM_REG_PPC_ICP_STATE, &state);
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if (ret != 0) {
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error_report("Unable to restore KVM interrupt controller state (0x%"
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PRIx64 ") for CPU %ld: %s", state, kvm_arch_vcpu_id(icp->cs),
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strerror(errno));
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return ret;
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}
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return 0;
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}
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static void icp_kvm_reset(DeviceState *dev)
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{
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ICPStateClass *icpc = ICP_GET_CLASS(dev);
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icpc->parent_reset(dev);
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icp_set_kvm_state(ICP(dev), 1);
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}
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static void icp_kvm_realize(DeviceState *dev, Error **errp)
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{
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ICPState *icp = ICP(dev);
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ICPStateClass *icpc = ICP_GET_CLASS(icp);
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Error *local_err = NULL;
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CPUState *cs;
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KVMEnabledICP *enabled_icp;
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unsigned long vcpu_id;
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int ret;
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if (kernel_xics_fd == -1) {
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abort();
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}
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icpc->parent_realize(dev, &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return;
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}
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cs = icp->cs;
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vcpu_id = kvm_arch_vcpu_id(cs);
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/*
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* If we are reusing a parked vCPU fd corresponding to the CPU
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* which was hot-removed earlier we don't have to renable
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* KVM_CAP_IRQ_XICS capability again.
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*/
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QLIST_FOREACH(enabled_icp, &kvm_enabled_icps, node) {
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if (enabled_icp->vcpu_id == vcpu_id) {
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return;
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}
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}
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ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0, kernel_xics_fd, vcpu_id);
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if (ret < 0) {
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error_setg(errp, "Unable to connect CPU%ld to kernel XICS: %s", vcpu_id,
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strerror(errno));
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return;
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}
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enabled_icp = g_malloc(sizeof(*enabled_icp));
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enabled_icp->vcpu_id = vcpu_id;
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QLIST_INSERT_HEAD(&kvm_enabled_icps, enabled_icp, node);
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}
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static void icp_kvm_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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ICPStateClass *icpc = ICP_CLASS(klass);
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device_class_set_parent_realize(dc, icp_kvm_realize,
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&icpc->parent_realize);
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device_class_set_parent_reset(dc, icp_kvm_reset,
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&icpc->parent_reset);
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icpc->pre_save = icp_get_kvm_state;
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icpc->post_load = icp_set_kvm_state;
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icpc->synchronize_state = icp_synchronize_state;
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}
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static const TypeInfo icp_kvm_info = {
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.name = TYPE_KVM_ICP,
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.parent = TYPE_ICP,
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.instance_size = sizeof(ICPState),
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.class_init = icp_kvm_class_init,
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.class_size = sizeof(ICPStateClass),
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};
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/*
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* ICS-KVM
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*/
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static void ics_get_kvm_state(ICSState *ics)
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{
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uint64_t state;
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int i;
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Error *local_err = NULL;
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for (i = 0; i < ics->nr_irqs; i++) {
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ICSIRQState *irq = &ics->irqs[i];
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kvm_device_access(kernel_xics_fd, KVM_DEV_XICS_GRP_SOURCES,
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i + ics->offset, &state, false, &local_err);
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if (local_err) {
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error_report_err(local_err);
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exit(1);
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}
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irq->server = state & KVM_XICS_DESTINATION_MASK;
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irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT)
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& KVM_XICS_PRIORITY_MASK;
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/*
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* To be consistent with the software emulation in xics.c, we
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* split out the masked state + priority that we get from the
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* kernel into 'current priority' (0xff if masked) and
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* 'saved priority' (if masked, this is the priority the
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* interrupt had before it was masked). Masking and unmasking
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* are done with the ibm,int-off and ibm,int-on RTAS calls.
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*/
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if (state & KVM_XICS_MASKED) {
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irq->priority = 0xff;
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} else {
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irq->priority = irq->saved_priority;
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}
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irq->status = 0;
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if (state & KVM_XICS_PENDING) {
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if (state & KVM_XICS_LEVEL_SENSITIVE) {
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irq->status |= XICS_STATUS_ASSERTED;
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} else {
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/*
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* A pending edge-triggered interrupt (or MSI)
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* must have been rejected previously when we
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* first detected it and tried to deliver it,
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* so mark it as pending and previously rejected
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* for consistency with how xics.c works.
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*/
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irq->status |= XICS_STATUS_MASKED_PENDING
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| XICS_STATUS_REJECTED;
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}
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}
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if (state & KVM_XICS_PRESENTED) {
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irq->status |= XICS_STATUS_PRESENTED;
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}
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if (state & KVM_XICS_QUEUED) {
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irq->status |= XICS_STATUS_QUEUED;
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}
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}
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}
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static void ics_synchronize_state(ICSState *ics)
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{
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ics_get_kvm_state(ics);
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}
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static int ics_set_kvm_state(ICSState *ics, int version_id)
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{
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uint64_t state;
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int i;
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Error *local_err = NULL;
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for (i = 0; i < ics->nr_irqs; i++) {
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ICSIRQState *irq = &ics->irqs[i];
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int ret;
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state = irq->server;
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state |= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK)
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<< KVM_XICS_PRIORITY_SHIFT;
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if (irq->priority != irq->saved_priority) {
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assert(irq->priority == 0xff);
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state |= KVM_XICS_MASKED;
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}
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if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) {
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state |= KVM_XICS_LEVEL_SENSITIVE;
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if (irq->status & XICS_STATUS_ASSERTED) {
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state |= KVM_XICS_PENDING;
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}
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} else {
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if (irq->status & XICS_STATUS_MASKED_PENDING) {
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state |= KVM_XICS_PENDING;
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}
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}
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if (irq->status & XICS_STATUS_PRESENTED) {
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state |= KVM_XICS_PRESENTED;
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}
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if (irq->status & XICS_STATUS_QUEUED) {
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state |= KVM_XICS_QUEUED;
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}
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ret = kvm_device_access(kernel_xics_fd, KVM_DEV_XICS_GRP_SOURCES,
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i + ics->offset, &state, true, &local_err);
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if (local_err) {
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error_report_err(local_err);
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return ret;
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}
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}
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return 0;
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}
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static void ics_kvm_set_irq(void *opaque, int srcno, int val)
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{
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ICSState *ics = opaque;
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struct kvm_irq_level args;
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int rc;
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args.irq = srcno + ics->offset;
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if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MSI) {
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if (!val) {
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return;
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}
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args.level = KVM_INTERRUPT_SET;
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} else {
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args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
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}
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rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args);
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if (rc < 0) {
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perror("kvm_irq_line");
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}
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}
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static void ics_kvm_reset(DeviceState *dev)
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{
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ICSStateClass *icsc = ICS_BASE_GET_CLASS(dev);
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icsc->parent_reset(dev);
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ics_set_kvm_state(ICS_KVM(dev), 1);
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}
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static void ics_kvm_reset_handler(void *dev)
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{
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ics_kvm_reset(dev);
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}
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static void ics_kvm_realize(DeviceState *dev, Error **errp)
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{
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ICSState *ics = ICS_KVM(dev);
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ICSStateClass *icsc = ICS_BASE_GET_CLASS(ics);
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Error *local_err = NULL;
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icsc->parent_realize(dev, &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return;
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}
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ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);
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qemu_register_reset(ics_kvm_reset_handler, ics);
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}
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static void ics_kvm_class_init(ObjectClass *klass, void *data)
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{
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ICSStateClass *icsc = ICS_BASE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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device_class_set_parent_realize(dc, ics_kvm_realize,
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&icsc->parent_realize);
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device_class_set_parent_reset(dc, ics_kvm_reset,
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&icsc->parent_reset);
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icsc->pre_save = ics_get_kvm_state;
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icsc->post_load = ics_set_kvm_state;
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icsc->synchronize_state = ics_synchronize_state;
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}
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static const TypeInfo ics_kvm_info = {
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.name = TYPE_ICS_KVM,
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.parent = TYPE_ICS_BASE,
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.instance_size = sizeof(ICSState),
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.class_init = ics_kvm_class_init,
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};
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/*
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* XICS-KVM
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*/
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static void rtas_dummy(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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uint32_t token,
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uint32_t nargs, target_ulong args,
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uint32_t nret, target_ulong rets)
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{
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error_report("pseries: %s must never be called for in-kernel XICS",
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__func__);
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}
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int xics_kvm_init(sPAPRMachineState *spapr, Error **errp)
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{
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int rc;
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if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) {
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error_setg(errp,
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"KVM and IRQ_XICS capability must be present for in-kernel XICS");
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goto fail;
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}
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spapr_rtas_register(RTAS_IBM_SET_XIVE, "ibm,set-xive", rtas_dummy);
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spapr_rtas_register(RTAS_IBM_GET_XIVE, "ibm,get-xive", rtas_dummy);
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spapr_rtas_register(RTAS_IBM_INT_OFF, "ibm,int-off", rtas_dummy);
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spapr_rtas_register(RTAS_IBM_INT_ON, "ibm,int-on", rtas_dummy);
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rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_SET_XIVE, "ibm,set-xive");
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if (rc < 0) {
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error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,set-xive");
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goto fail;
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}
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rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_GET_XIVE, "ibm,get-xive");
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if (rc < 0) {
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error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,get-xive");
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goto fail;
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}
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rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_ON, "ibm,int-on");
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if (rc < 0) {
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error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-on");
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goto fail;
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}
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rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_OFF, "ibm,int-off");
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if (rc < 0) {
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error_setg(errp, "kvmppc_define_rtas_kernel_token: ibm,int-off");
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goto fail;
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}
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/* Create the KVM XICS device */
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rc = kvm_create_device(kvm_state, KVM_DEV_TYPE_XICS, false);
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if (rc < 0) {
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error_setg_errno(errp, -rc, "Error on KVM_CREATE_DEVICE for XICS");
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goto fail;
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}
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kernel_xics_fd = rc;
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kvm_kernel_irqchip = true;
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kvm_msi_via_irqfd_allowed = true;
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kvm_gsi_direct_mapping = true;
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return 0;
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fail:
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kvmppc_define_rtas_kernel_token(0, "ibm,set-xive");
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kvmppc_define_rtas_kernel_token(0, "ibm,get-xive");
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kvmppc_define_rtas_kernel_token(0, "ibm,int-on");
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kvmppc_define_rtas_kernel_token(0, "ibm,int-off");
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return -1;
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}
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static void xics_kvm_register_types(void)
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{
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type_register_static(&ics_kvm_info);
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type_register_static(&icp_kvm_info);
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}
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type_init(xics_kvm_register_types)
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