POWER9 DD1 silicon has some bugs which mean it a) isn't really compliant with the ISA v3.00 and b) require a number of special workarounds in the kernel. At the moment, qemu isn't aware of DD1. For TCG we don't really want it to be (why bother emulating buggy silicon). But with KVM, the guest does need to be aware of DD1 so it can apply the necessary workarounds. Meanwhile, the feature negotiation between qemu and the guest strongly favours architected compatibility modes to "raw" CPU modes. In combination with the above, this means the guest sees architected POWER9 mode, and doesn't apply the DD1 workarounds. Well, unless it has yet another workaround to partially ignore what qemu tells it. This patch addresses this by disabling support for compatibility modes when using KVM on a POWER9 DD1 host. Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
756 lines
30 KiB
C
756 lines
30 KiB
C
/*
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* PowerPC CPU initialization for qemu.
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*
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* Copyright (c) 2003-2007 Jocelyn Mayer
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2013 SUSE LINUX Products GmbH
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef TARGET_PPC_CPU_MODELS_H
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#define TARGET_PPC_CPU_MODELS_H
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/**
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* PowerPCCPUAlias:
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* @alias: The alias name.
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* @model: The CPU model @alias refers to.
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*
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* A mapping entry from CPU @alias to CPU @model.
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*/
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typedef struct PowerPCCPUAlias {
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const char *alias;
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const char *model;
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ObjectClass *oc;
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} PowerPCCPUAlias;
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extern PowerPCCPUAlias ppc_cpu_aliases[];
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/*****************************************************************************/
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/* PVR definitions for most known PowerPC */
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enum {
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/* PowerPC 401 family */
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/* Generic PowerPC 401 */
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#define CPU_POWERPC_401 CPU_POWERPC_401G2
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/* PowerPC 401 cores */
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CPU_POWERPC_401A1 = 0x00210000,
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CPU_POWERPC_401B2 = 0x00220000,
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#if 0
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CPU_POWERPC_401B3 = xxx,
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#endif
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CPU_POWERPC_401C2 = 0x00230000,
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CPU_POWERPC_401D2 = 0x00240000,
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CPU_POWERPC_401E2 = 0x00250000,
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CPU_POWERPC_401F2 = 0x00260000,
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CPU_POWERPC_401G2 = 0x00270000,
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/* PowerPC 401 microcontrolers */
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#if 0
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CPU_POWERPC_401GF = xxx,
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#endif
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#define CPU_POWERPC_IOP480 CPU_POWERPC_401B2
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/* IBM Processor for Network Resources */
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CPU_POWERPC_COBRA = 0x10100000, /* XXX: 405 ? */
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#if 0
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CPU_POWERPC_XIPCHIP = xxx,
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#endif
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/* PowerPC 403 family */
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/* PowerPC 403 microcontrollers */
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CPU_POWERPC_403GA = 0x00200011,
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CPU_POWERPC_403GB = 0x00200100,
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CPU_POWERPC_403GC = 0x00200200,
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CPU_POWERPC_403GCX = 0x00201400,
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#if 0
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CPU_POWERPC_403GP = xxx,
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#endif
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/* PowerPC 405 family */
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/* PowerPC 405 cores */
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#if 0
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CPU_POWERPC_405A3 = xxx,
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#endif
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#if 0
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CPU_POWERPC_405A4 = xxx,
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#endif
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#if 0
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CPU_POWERPC_405B3 = xxx,
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#endif
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#if 0
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CPU_POWERPC_405B4 = xxx,
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#endif
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#if 0
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CPU_POWERPC_405C3 = xxx,
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#endif
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#if 0
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CPU_POWERPC_405C4 = xxx,
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#endif
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CPU_POWERPC_405D2 = 0x20010000,
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#if 0
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CPU_POWERPC_405D3 = xxx,
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#endif
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CPU_POWERPC_405D4 = 0x41810000,
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#if 0
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CPU_POWERPC_405D5 = xxx,
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#endif
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#if 0
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CPU_POWERPC_405E4 = xxx,
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#endif
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#if 0
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CPU_POWERPC_405F4 = xxx,
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#endif
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#if 0
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CPU_POWERPC_405F5 = xxx,
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#endif
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#if 0
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CPU_POWERPC_405F6 = xxx,
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#endif
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/* PowerPC 405 microcontrolers */
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/* XXX: missing 0x200108a0 */
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CPU_POWERPC_405CRa = 0x40110041,
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CPU_POWERPC_405CRb = 0x401100C5,
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CPU_POWERPC_405CRc = 0x40110145,
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CPU_POWERPC_405EP = 0x51210950,
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#if 0
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CPU_POWERPC_405EXr = xxx,
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#endif
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CPU_POWERPC_405EZ = 0x41511460, /* 0x51210950 ? */
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#if 0
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CPU_POWERPC_405FX = xxx,
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#endif
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CPU_POWERPC_405GPa = 0x40110000,
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CPU_POWERPC_405GPb = 0x40110040,
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CPU_POWERPC_405GPc = 0x40110082,
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CPU_POWERPC_405GPd = 0x401100C4,
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CPU_POWERPC_405GPR = 0x50910951,
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#if 0
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CPU_POWERPC_405H = xxx,
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#endif
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#if 0
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CPU_POWERPC_405L = xxx,
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#endif
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CPU_POWERPC_405LP = 0x41F10000,
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#if 0
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CPU_POWERPC_405PM = xxx,
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#endif
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#if 0
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CPU_POWERPC_405PS = xxx,
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#endif
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#if 0
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CPU_POWERPC_405S = xxx,
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#endif
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/* IBM network processors */
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CPU_POWERPC_NPE405H = 0x414100C0,
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CPU_POWERPC_NPE405H2 = 0x41410140,
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CPU_POWERPC_NPE405L = 0x416100C0,
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CPU_POWERPC_NPE4GS3 = 0x40B10000,
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#if 0
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CPU_POWERPC_NPCxx1 = xxx,
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#endif
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#if 0
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CPU_POWERPC_NPR161 = xxx,
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#endif
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#if 0
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CPU_POWERPC_LC77700 = xxx,
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#endif
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/* IBM STBxxx (PowerPC 401/403/405 core based microcontrollers) */
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#if 0
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CPU_POWERPC_STB01000 = xxx,
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#endif
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#if 0
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CPU_POWERPC_STB01010 = xxx,
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#endif
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#if 0
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CPU_POWERPC_STB0210 = xxx, /* 401B3 */
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#endif
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CPU_POWERPC_STB03 = 0x40310000, /* 0x40130000 ? */
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#if 0
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CPU_POWERPC_STB043 = xxx,
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#endif
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#if 0
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CPU_POWERPC_STB045 = xxx,
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#endif
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CPU_POWERPC_STB04 = 0x41810000,
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CPU_POWERPC_STB25 = 0x51510950,
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#if 0
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CPU_POWERPC_STB130 = xxx,
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#endif
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/* Xilinx cores */
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CPU_POWERPC_X2VP4 = 0x20010820,
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CPU_POWERPC_X2VP20 = 0x20010860,
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#if 0
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CPU_POWERPC_ZL10310 = xxx,
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#endif
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#if 0
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CPU_POWERPC_ZL10311 = xxx,
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#endif
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#if 0
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CPU_POWERPC_ZL10320 = xxx,
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#endif
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#if 0
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CPU_POWERPC_ZL10321 = xxx,
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#endif
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/* PowerPC 440 family */
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/* Generic PowerPC 440 */
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#define CPU_POWERPC_440 CPU_POWERPC_440GXf
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/* PowerPC 440 cores */
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#if 0
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CPU_POWERPC_440A4 = xxx,
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#endif
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CPU_POWERPC_440_XILINX = 0x7ff21910,
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#if 0
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CPU_POWERPC_440A5 = xxx,
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#endif
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#if 0
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CPU_POWERPC_440B4 = xxx,
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#endif
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#if 0
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CPU_POWERPC_440F5 = xxx,
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#endif
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#if 0
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CPU_POWERPC_440G5 = xxx,
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#endif
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#if 0
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CPU_POWERPC_440H4 = xxx,
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#endif
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#if 0
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CPU_POWERPC_440H6 = xxx,
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#endif
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/* PowerPC 440 microcontrolers */
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CPU_POWERPC_440EPa = 0x42221850,
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CPU_POWERPC_440EPb = 0x422218D3,
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CPU_POWERPC_440GPb = 0x40120440,
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CPU_POWERPC_440GPc = 0x40120481,
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#define CPU_POWERPC_440GRa CPU_POWERPC_440EPb
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CPU_POWERPC_440GRX = 0x200008D0,
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#define CPU_POWERPC_440EPX CPU_POWERPC_440GRX
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CPU_POWERPC_440GXa = 0x51B21850,
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CPU_POWERPC_440GXb = 0x51B21851,
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CPU_POWERPC_440GXc = 0x51B21892,
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CPU_POWERPC_440GXf = 0x51B21894,
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#if 0
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CPU_POWERPC_440S = xxx,
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#endif
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CPU_POWERPC_440SP = 0x53221850,
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CPU_POWERPC_440SP2 = 0x53221891,
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CPU_POWERPC_440SPE = 0x53421890,
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/* PowerPC 460 family */
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#if 0
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/* Generic PowerPC 464 */
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#define CPU_POWERPC_464 CPU_POWERPC_464H90
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#endif
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/* PowerPC 464 microcontrolers */
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#if 0
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CPU_POWERPC_464H90 = xxx,
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#endif
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#if 0
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CPU_POWERPC_464H90FP = xxx,
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#endif
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/* Freescale embedded PowerPC cores */
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/* PowerPC MPC 5xx cores (aka RCPU) */
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CPU_POWERPC_MPC5xx = 0x00020020,
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/* PowerPC MPC 8xx cores (aka PowerQUICC) */
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CPU_POWERPC_MPC8xx = 0x00500000,
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/* G2 cores (aka PowerQUICC-II) */
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CPU_POWERPC_G2 = 0x00810011,
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CPU_POWERPC_G2H4 = 0x80811010,
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CPU_POWERPC_G2gp = 0x80821010,
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CPU_POWERPC_G2ls = 0x90810010,
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CPU_POWERPC_MPC603 = 0x00810100,
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CPU_POWERPC_G2_HIP3 = 0x00810101,
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CPU_POWERPC_G2_HIP4 = 0x80811014,
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/* G2_LE core (aka PowerQUICC-II) */
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CPU_POWERPC_G2LE = 0x80820010,
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CPU_POWERPC_G2LEgp = 0x80822010,
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CPU_POWERPC_G2LEls = 0xA0822010,
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CPU_POWERPC_G2LEgp1 = 0x80822011,
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CPU_POWERPC_G2LEgp3 = 0x80822013,
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/* MPC52xx microcontrollers */
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/* XXX: MPC 5121 ? */
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#define CPU_POWERPC_MPC5200_v10 CPU_POWERPC_G2LEgp1
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#define CPU_POWERPC_MPC5200_v11 CPU_POWERPC_G2LEgp1
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#define CPU_POWERPC_MPC5200_v12 CPU_POWERPC_G2LEgp1
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#define CPU_POWERPC_MPC5200B_v20 CPU_POWERPC_G2LEgp1
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#define CPU_POWERPC_MPC5200B_v21 CPU_POWERPC_G2LEgp1
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/* e200 family */
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/* e200 cores */
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#if 0
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CPU_POWERPC_e200z0 = xxx,
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#endif
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#if 0
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CPU_POWERPC_e200z1 = xxx,
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#endif
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#if 0 /* ? */
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CPU_POWERPC_e200z3 = 0x81120000,
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#endif
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CPU_POWERPC_e200z5 = 0x81000000,
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CPU_POWERPC_e200z6 = 0x81120000,
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/* MPC55xx microcontrollers */
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#define CPU_POWERPC_MPC55xx CPU_POWERPC_MPC5567
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#if 0
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#define CPU_POWERPC_MPC5514E CPU_POWERPC_MPC5514E_v1
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#define CPU_POWERPC_MPC5514E_v0 CPU_POWERPC_e200z0
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#define CPU_POWERPC_MPC5514E_v1 CPU_POWERPC_e200z1
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#define CPU_POWERPC_MPC5514G CPU_POWERPC_MPC5514G_v1
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#define CPU_POWERPC_MPC5514G_v0 CPU_POWERPC_e200z0
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#define CPU_POWERPC_MPC5514G_v1 CPU_POWERPC_e200z1
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#define CPU_POWERPC_MPC5515S CPU_POWERPC_e200z1
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#define CPU_POWERPC_MPC5516E CPU_POWERPC_MPC5516E_v1
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#define CPU_POWERPC_MPC5516E_v0 CPU_POWERPC_e200z0
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#define CPU_POWERPC_MPC5516E_v1 CPU_POWERPC_e200z1
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#define CPU_POWERPC_MPC5516G CPU_POWERPC_MPC5516G_v1
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#define CPU_POWERPC_MPC5516G_v0 CPU_POWERPC_e200z0
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#define CPU_POWERPC_MPC5516G_v1 CPU_POWERPC_e200z1
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#define CPU_POWERPC_MPC5516S CPU_POWERPC_e200z1
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#endif
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#if 0
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#define CPU_POWERPC_MPC5533 CPU_POWERPC_e200z3
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#define CPU_POWERPC_MPC5534 CPU_POWERPC_e200z3
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#endif
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#define CPU_POWERPC_MPC5553 CPU_POWERPC_e200z6
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#define CPU_POWERPC_MPC5554 CPU_POWERPC_e200z6
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#define CPU_POWERPC_MPC5561 CPU_POWERPC_e200z6
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#define CPU_POWERPC_MPC5565 CPU_POWERPC_e200z6
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#define CPU_POWERPC_MPC5566 CPU_POWERPC_e200z6
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#define CPU_POWERPC_MPC5567 CPU_POWERPC_e200z6
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/* e300 family */
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/* e300 cores */
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CPU_POWERPC_e300c1 = 0x00830010,
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CPU_POWERPC_e300c2 = 0x00840010,
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CPU_POWERPC_e300c3 = 0x00850010,
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CPU_POWERPC_e300c4 = 0x00860010,
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/* MPC83xx microcontrollers */
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#define CPU_POWERPC_MPC831x CPU_POWERPC_e300c3
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#define CPU_POWERPC_MPC832x CPU_POWERPC_e300c2
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#define CPU_POWERPC_MPC834x CPU_POWERPC_e300c1
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#define CPU_POWERPC_MPC835x CPU_POWERPC_e300c1
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#define CPU_POWERPC_MPC836x CPU_POWERPC_e300c1
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#define CPU_POWERPC_MPC837x CPU_POWERPC_e300c4
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/* e500 family */
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/* e500 cores */
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#define CPU_POWERPC_e500 CPU_POWERPC_e500v2_v22
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CPU_POWERPC_e500v1_v10 = 0x80200010,
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CPU_POWERPC_e500v1_v20 = 0x80200020,
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CPU_POWERPC_e500v2_v10 = 0x80210010,
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CPU_POWERPC_e500v2_v11 = 0x80210011,
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CPU_POWERPC_e500v2_v20 = 0x80210020,
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CPU_POWERPC_e500v2_v21 = 0x80210021,
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CPU_POWERPC_e500v2_v22 = 0x80210022,
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CPU_POWERPC_e500v2_v30 = 0x80210030,
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CPU_POWERPC_e500mc = 0x80230020,
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CPU_POWERPC_e5500 = 0x80240020,
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/* MPC85xx microcontrollers */
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#define CPU_POWERPC_MPC8533_v10 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8533_v11 CPU_POWERPC_e500v2_v22
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#define CPU_POWERPC_MPC8533E_v10 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8533E_v11 CPU_POWERPC_e500v2_v22
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#define CPU_POWERPC_MPC8540_v10 CPU_POWERPC_e500v1_v10
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#define CPU_POWERPC_MPC8540_v20 CPU_POWERPC_e500v1_v20
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#define CPU_POWERPC_MPC8540_v21 CPU_POWERPC_e500v1_v20
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#define CPU_POWERPC_MPC8541_v10 CPU_POWERPC_e500v1_v20
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#define CPU_POWERPC_MPC8541_v11 CPU_POWERPC_e500v1_v20
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#define CPU_POWERPC_MPC8541E_v10 CPU_POWERPC_e500v1_v20
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#define CPU_POWERPC_MPC8541E_v11 CPU_POWERPC_e500v1_v20
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#define CPU_POWERPC_MPC8543_v10 CPU_POWERPC_e500v2_v10
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#define CPU_POWERPC_MPC8543_v11 CPU_POWERPC_e500v2_v11
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#define CPU_POWERPC_MPC8543_v20 CPU_POWERPC_e500v2_v20
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#define CPU_POWERPC_MPC8543_v21 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8543E_v10 CPU_POWERPC_e500v2_v10
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#define CPU_POWERPC_MPC8543E_v11 CPU_POWERPC_e500v2_v11
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#define CPU_POWERPC_MPC8543E_v20 CPU_POWERPC_e500v2_v20
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#define CPU_POWERPC_MPC8543E_v21 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8544_v10 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8544_v11 CPU_POWERPC_e500v2_v22
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#define CPU_POWERPC_MPC8544E_v11 CPU_POWERPC_e500v2_v22
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#define CPU_POWERPC_MPC8544E_v10 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8545_v10 CPU_POWERPC_e500v2_v10
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#define CPU_POWERPC_MPC8545_v20 CPU_POWERPC_e500v2_v20
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#define CPU_POWERPC_MPC8545_v21 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8545E_v10 CPU_POWERPC_e500v2_v10
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#define CPU_POWERPC_MPC8545E_v20 CPU_POWERPC_e500v2_v20
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#define CPU_POWERPC_MPC8545E_v21 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8547E_v10 CPU_POWERPC_e500v2_v10
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#define CPU_POWERPC_MPC8547E_v20 CPU_POWERPC_e500v2_v20
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#define CPU_POWERPC_MPC8547E_v21 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8548_v10 CPU_POWERPC_e500v2_v10
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#define CPU_POWERPC_MPC8548_v11 CPU_POWERPC_e500v2_v11
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#define CPU_POWERPC_MPC8548_v20 CPU_POWERPC_e500v2_v20
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#define CPU_POWERPC_MPC8548_v21 CPU_POWERPC_e500v2_v21
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#define CPU_POWERPC_MPC8548E_v10 CPU_POWERPC_e500v2_v10
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#define CPU_POWERPC_MPC8548E_v11 CPU_POWERPC_e500v2_v11
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#define CPU_POWERPC_MPC8548E_v20 CPU_POWERPC_e500v2_v20
|
|
#define CPU_POWERPC_MPC8548E_v21 CPU_POWERPC_e500v2_v21
|
|
#define CPU_POWERPC_MPC8555_v10 CPU_POWERPC_e500v2_v10
|
|
#define CPU_POWERPC_MPC8555_v11 CPU_POWERPC_e500v2_v11
|
|
#define CPU_POWERPC_MPC8555E_v10 CPU_POWERPC_e500v2_v10
|
|
#define CPU_POWERPC_MPC8555E_v11 CPU_POWERPC_e500v2_v11
|
|
#define CPU_POWERPC_MPC8560_v10 CPU_POWERPC_e500v2_v10
|
|
#define CPU_POWERPC_MPC8560_v20 CPU_POWERPC_e500v2_v20
|
|
#define CPU_POWERPC_MPC8560_v21 CPU_POWERPC_e500v2_v21
|
|
#define CPU_POWERPC_MPC8567 CPU_POWERPC_e500v2_v22
|
|
#define CPU_POWERPC_MPC8567E CPU_POWERPC_e500v2_v22
|
|
#define CPU_POWERPC_MPC8568 CPU_POWERPC_e500v2_v22
|
|
#define CPU_POWERPC_MPC8568E CPU_POWERPC_e500v2_v22
|
|
#define CPU_POWERPC_MPC8572 CPU_POWERPC_e500v2_v30
|
|
#define CPU_POWERPC_MPC8572E CPU_POWERPC_e500v2_v30
|
|
/* e600 family */
|
|
/* e600 cores */
|
|
CPU_POWERPC_e600 = 0x80040010,
|
|
/* MPC86xx microcontrollers */
|
|
#define CPU_POWERPC_MPC8610 CPU_POWERPC_e600
|
|
#define CPU_POWERPC_MPC8641 CPU_POWERPC_e600
|
|
#define CPU_POWERPC_MPC8641D CPU_POWERPC_e600
|
|
/* PowerPC 6xx cores */
|
|
CPU_POWERPC_601_v0 = 0x00010001,
|
|
CPU_POWERPC_601_v1 = 0x00010001,
|
|
CPU_POWERPC_601_v2 = 0x00010002,
|
|
CPU_POWERPC_602 = 0x00050100,
|
|
CPU_POWERPC_603 = 0x00030100,
|
|
CPU_POWERPC_603E_v11 = 0x00060101,
|
|
CPU_POWERPC_603E_v12 = 0x00060102,
|
|
CPU_POWERPC_603E_v13 = 0x00060103,
|
|
CPU_POWERPC_603E_v14 = 0x00060104,
|
|
CPU_POWERPC_603E_v22 = 0x00060202,
|
|
CPU_POWERPC_603E_v3 = 0x00060300,
|
|
CPU_POWERPC_603E_v4 = 0x00060400,
|
|
CPU_POWERPC_603E_v41 = 0x00060401,
|
|
CPU_POWERPC_603E7t = 0x00071201,
|
|
CPU_POWERPC_603E7v = 0x00070100,
|
|
CPU_POWERPC_603E7v1 = 0x00070101,
|
|
CPU_POWERPC_603E7v2 = 0x00070201,
|
|
CPU_POWERPC_603E7 = 0x00070200,
|
|
CPU_POWERPC_603P = 0x00070000,
|
|
/* XXX: missing 0x00040303 (604) */
|
|
CPU_POWERPC_604 = 0x00040103,
|
|
/* XXX: missing 0x00091203 */
|
|
/* XXX: missing 0x00092110 */
|
|
/* XXX: missing 0x00092120 */
|
|
CPU_POWERPC_604E_v10 = 0x00090100,
|
|
CPU_POWERPC_604E_v22 = 0x00090202,
|
|
CPU_POWERPC_604E_v24 = 0x00090204,
|
|
/* XXX: missing 0x000a0100 */
|
|
/* XXX: missing 0x00093102 */
|
|
CPU_POWERPC_604R = 0x000a0101,
|
|
#if 0
|
|
CPU_POWERPC_604EV = xxx, /* XXX: same as 604R ? */
|
|
#endif
|
|
/* PowerPC 740/750 cores (aka G3) */
|
|
/* XXX: missing 0x00084202 */
|
|
CPU_POWERPC_7x0_v10 = 0x00080100,
|
|
CPU_POWERPC_7x0_v20 = 0x00080200,
|
|
CPU_POWERPC_7x0_v21 = 0x00080201,
|
|
CPU_POWERPC_7x0_v22 = 0x00080202,
|
|
CPU_POWERPC_7x0_v30 = 0x00080300,
|
|
CPU_POWERPC_7x0_v31 = 0x00080301,
|
|
CPU_POWERPC_740E = 0x00080100,
|
|
CPU_POWERPC_750E = 0x00080200,
|
|
CPU_POWERPC_7x0P = 0x10080000,
|
|
/* XXX: missing 0x00087010 (CL ?) */
|
|
CPU_POWERPC_750CL_v10 = 0x00087200,
|
|
CPU_POWERPC_750CL_v20 = 0x00087210, /* aka rev E */
|
|
CPU_POWERPC_750CX_v10 = 0x00082100,
|
|
CPU_POWERPC_750CX_v20 = 0x00082200,
|
|
CPU_POWERPC_750CX_v21 = 0x00082201,
|
|
CPU_POWERPC_750CX_v22 = 0x00082202,
|
|
CPU_POWERPC_750CXE_v21 = 0x00082211,
|
|
CPU_POWERPC_750CXE_v22 = 0x00082212,
|
|
CPU_POWERPC_750CXE_v23 = 0x00082213,
|
|
CPU_POWERPC_750CXE_v24 = 0x00082214,
|
|
CPU_POWERPC_750CXE_v24b = 0x00083214,
|
|
CPU_POWERPC_750CXE_v30 = 0x00082310,
|
|
CPU_POWERPC_750CXE_v31 = 0x00082311,
|
|
CPU_POWERPC_750CXE_v31b = 0x00083311,
|
|
CPU_POWERPC_750CXR = 0x00083410,
|
|
CPU_POWERPC_750FL = 0x70000203,
|
|
CPU_POWERPC_750FX_v10 = 0x70000100,
|
|
CPU_POWERPC_750FX_v20 = 0x70000200,
|
|
CPU_POWERPC_750FX_v21 = 0x70000201,
|
|
CPU_POWERPC_750FX_v22 = 0x70000202,
|
|
CPU_POWERPC_750FX_v23 = 0x70000203,
|
|
CPU_POWERPC_750GL = 0x70020102,
|
|
CPU_POWERPC_750GX_v10 = 0x70020100,
|
|
CPU_POWERPC_750GX_v11 = 0x70020101,
|
|
CPU_POWERPC_750GX_v12 = 0x70020102,
|
|
CPU_POWERPC_750L_v20 = 0x00088200,
|
|
CPU_POWERPC_750L_v21 = 0x00088201,
|
|
CPU_POWERPC_750L_v22 = 0x00088202,
|
|
CPU_POWERPC_750L_v30 = 0x00088300,
|
|
CPU_POWERPC_750L_v32 = 0x00088302,
|
|
/* PowerPC 745/755 cores */
|
|
CPU_POWERPC_7x5_v10 = 0x00083100,
|
|
CPU_POWERPC_7x5_v11 = 0x00083101,
|
|
CPU_POWERPC_7x5_v20 = 0x00083200,
|
|
CPU_POWERPC_7x5_v21 = 0x00083201,
|
|
CPU_POWERPC_7x5_v22 = 0x00083202, /* aka D */
|
|
CPU_POWERPC_7x5_v23 = 0x00083203, /* aka E */
|
|
CPU_POWERPC_7x5_v24 = 0x00083204,
|
|
CPU_POWERPC_7x5_v25 = 0x00083205,
|
|
CPU_POWERPC_7x5_v26 = 0x00083206,
|
|
CPU_POWERPC_7x5_v27 = 0x00083207,
|
|
CPU_POWERPC_7x5_v28 = 0x00083208,
|
|
#if 0
|
|
CPU_POWERPC_7x5P = xxx,
|
|
#endif
|
|
/* PowerPC 74xx cores (aka G4) */
|
|
/* XXX: missing 0x000C1101 */
|
|
CPU_POWERPC_7400_v10 = 0x000C0100,
|
|
CPU_POWERPC_7400_v11 = 0x000C0101,
|
|
CPU_POWERPC_7400_v20 = 0x000C0200,
|
|
CPU_POWERPC_7400_v21 = 0x000C0201,
|
|
CPU_POWERPC_7400_v22 = 0x000C0202,
|
|
CPU_POWERPC_7400_v26 = 0x000C0206,
|
|
CPU_POWERPC_7400_v27 = 0x000C0207,
|
|
CPU_POWERPC_7400_v28 = 0x000C0208,
|
|
CPU_POWERPC_7400_v29 = 0x000C0209,
|
|
CPU_POWERPC_7410_v10 = 0x800C1100,
|
|
CPU_POWERPC_7410_v11 = 0x800C1101,
|
|
CPU_POWERPC_7410_v12 = 0x800C1102, /* aka C */
|
|
CPU_POWERPC_7410_v13 = 0x800C1103, /* aka D */
|
|
CPU_POWERPC_7410_v14 = 0x800C1104, /* aka E */
|
|
CPU_POWERPC_7448_v10 = 0x80040100,
|
|
CPU_POWERPC_7448_v11 = 0x80040101,
|
|
CPU_POWERPC_7448_v20 = 0x80040200,
|
|
CPU_POWERPC_7448_v21 = 0x80040201,
|
|
CPU_POWERPC_7450_v10 = 0x80000100,
|
|
CPU_POWERPC_7450_v11 = 0x80000101,
|
|
CPU_POWERPC_7450_v12 = 0x80000102,
|
|
CPU_POWERPC_7450_v20 = 0x80000200, /* aka A, B, C, D: 2.04 */
|
|
CPU_POWERPC_7450_v21 = 0x80000201, /* aka E */
|
|
CPU_POWERPC_74x1_v23 = 0x80000203, /* aka G: 2.3 */
|
|
/* XXX: this entry might be a bug in some documentation */
|
|
CPU_POWERPC_74x1_v210 = 0x80000210, /* aka G: 2.3 ? */
|
|
CPU_POWERPC_74x5_v10 = 0x80010100,
|
|
/* XXX: missing 0x80010200 */
|
|
CPU_POWERPC_74x5_v21 = 0x80010201, /* aka C: 2.1 */
|
|
CPU_POWERPC_74x5_v32 = 0x80010302,
|
|
CPU_POWERPC_74x5_v33 = 0x80010303, /* aka F: 3.3 */
|
|
CPU_POWERPC_74x5_v34 = 0x80010304, /* aka G: 3.4 */
|
|
CPU_POWERPC_74x7_v10 = 0x80020100, /* aka A: 1.0 */
|
|
CPU_POWERPC_74x7_v11 = 0x80020101, /* aka B: 1.1 */
|
|
CPU_POWERPC_74x7_v12 = 0x80020102, /* aka C: 1.2 */
|
|
CPU_POWERPC_74x7A_v10 = 0x80030100, /* aka A: 1.0 */
|
|
CPU_POWERPC_74x7A_v11 = 0x80030101, /* aka B: 1.1 */
|
|
CPU_POWERPC_74x7A_v12 = 0x80030102, /* aka C: 1.2 */
|
|
/* 64 bits PowerPC */
|
|
#if defined(TARGET_PPC64)
|
|
CPU_POWERPC_620 = 0x00140000,
|
|
CPU_POWERPC_630 = 0x00400000,
|
|
CPU_POWERPC_631 = 0x00410104,
|
|
CPU_POWERPC_POWER4 = 0x00350000,
|
|
CPU_POWERPC_POWER4P = 0x00380000,
|
|
/* XXX: missing 0x003A0201 */
|
|
CPU_POWERPC_POWER5 = 0x003A0203,
|
|
CPU_POWERPC_POWER5P_v21 = 0x003B0201,
|
|
CPU_POWERPC_POWER6 = 0x003E0000,
|
|
CPU_POWERPC_POWER_SERVER_MASK = 0xFFFF0000,
|
|
CPU_POWERPC_POWER7_BASE = 0x003F0000,
|
|
CPU_POWERPC_POWER7_v23 = 0x003F0203,
|
|
CPU_POWERPC_POWER7P_BASE = 0x004A0000,
|
|
CPU_POWERPC_POWER7P_v21 = 0x004A0201,
|
|
CPU_POWERPC_POWER8E_BASE = 0x004B0000,
|
|
CPU_POWERPC_POWER8E_v21 = 0x004B0201,
|
|
CPU_POWERPC_POWER8_BASE = 0x004D0000,
|
|
CPU_POWERPC_POWER8_v20 = 0x004D0200,
|
|
CPU_POWERPC_POWER8NVL_BASE = 0x004C0000,
|
|
CPU_POWERPC_POWER8NVL_v10 = 0x004C0100,
|
|
CPU_POWERPC_POWER9_BASE = 0x004E0000,
|
|
CPU_POWERPC_POWER9_DD1 = 0x004E0100,
|
|
CPU_POWERPC_970_v22 = 0x00390202,
|
|
CPU_POWERPC_970FX_v10 = 0x00391100,
|
|
CPU_POWERPC_970FX_v20 = 0x003C0200,
|
|
CPU_POWERPC_970FX_v21 = 0x003C0201,
|
|
CPU_POWERPC_970FX_v30 = 0x003C0300,
|
|
CPU_POWERPC_970FX_v31 = 0x003C0301,
|
|
CPU_POWERPC_970MP_v10 = 0x00440100,
|
|
CPU_POWERPC_970MP_v11 = 0x00440101,
|
|
#define CPU_POWERPC_CELL CPU_POWERPC_CELL_v32
|
|
CPU_POWERPC_CELL_v10 = 0x00700100,
|
|
CPU_POWERPC_CELL_v20 = 0x00700400,
|
|
CPU_POWERPC_CELL_v30 = 0x00700500,
|
|
CPU_POWERPC_CELL_v31 = 0x00700501,
|
|
#define CPU_POWERPC_CELL_v32 CPU_POWERPC_CELL_v31
|
|
CPU_POWERPC_RS64 = 0x00330000,
|
|
CPU_POWERPC_RS64II = 0x00340000,
|
|
CPU_POWERPC_RS64III = 0x00360000,
|
|
CPU_POWERPC_RS64IV = 0x00370000,
|
|
#endif /* defined(TARGET_PPC64) */
|
|
/* Original POWER */
|
|
/* XXX: should be POWER (RIOS), RSC3308, RSC4608,
|
|
* POWER2 (RIOS2) & RSC2 (P2SC) here
|
|
*/
|
|
#if 0
|
|
CPU_POWER = xxx, /* 0x20000 ? 0x30000 for RSC ? */
|
|
#endif
|
|
#if 0
|
|
CPU_POWER2 = xxx, /* 0x40000 ? */
|
|
#endif
|
|
/* PA Semi core */
|
|
CPU_POWERPC_PA6T = 0x00900000,
|
|
};
|
|
|
|
/* Logical PVR definitions for sPAPR */
|
|
enum {
|
|
CPU_POWERPC_LOGICAL_2_04 = 0x0F000001,
|
|
CPU_POWERPC_LOGICAL_2_05 = 0x0F000002,
|
|
CPU_POWERPC_LOGICAL_2_06 = 0x0F000003,
|
|
CPU_POWERPC_LOGICAL_2_06_PLUS = 0x0F100003,
|
|
CPU_POWERPC_LOGICAL_2_07 = 0x0F000004,
|
|
CPU_POWERPC_LOGICAL_3_00 = 0x0F000005,
|
|
};
|
|
|
|
/* System version register (used on MPC 8xxx) */
|
|
enum {
|
|
POWERPC_SVR_NONE = 0x00000000,
|
|
POWERPC_SVR_5200_v10 = 0x80110010,
|
|
POWERPC_SVR_5200_v11 = 0x80110011,
|
|
POWERPC_SVR_5200_v12 = 0x80110012,
|
|
POWERPC_SVR_5200B_v20 = 0x80110020,
|
|
POWERPC_SVR_5200B_v21 = 0x80110021,
|
|
#define POWERPC_SVR_55xx POWERPC_SVR_5567
|
|
#if 0
|
|
POWERPC_SVR_5533 = xxx,
|
|
#endif
|
|
#if 0
|
|
POWERPC_SVR_5534 = xxx,
|
|
#endif
|
|
#if 0
|
|
POWERPC_SVR_5553 = xxx,
|
|
#endif
|
|
#if 0
|
|
POWERPC_SVR_5554 = xxx,
|
|
#endif
|
|
#if 0
|
|
POWERPC_SVR_5561 = xxx,
|
|
#endif
|
|
#if 0
|
|
POWERPC_SVR_5565 = xxx,
|
|
#endif
|
|
#if 0
|
|
POWERPC_SVR_5566 = xxx,
|
|
#endif
|
|
#if 0
|
|
POWERPC_SVR_5567 = xxx,
|
|
#endif
|
|
#if 0
|
|
POWERPC_SVR_8313 = xxx,
|
|
#endif
|
|
#if 0
|
|
POWERPC_SVR_8313E = xxx,
|
|
#endif
|
|
#if 0
|
|
POWERPC_SVR_8314 = xxx,
|
|
#endif
|
|
#if 0
|
|
POWERPC_SVR_8314E = xxx,
|
|
#endif
|
|
#if 0
|
|
POWERPC_SVR_8315 = xxx,
|
|
#endif
|
|
#if 0
|
|
POWERPC_SVR_8315E = xxx,
|
|
#endif
|
|
#if 0
|
|
POWERPC_SVR_8321 = xxx,
|
|
#endif
|
|
#if 0
|
|
POWERPC_SVR_8321E = xxx,
|
|
#endif
|
|
#if 0
|
|
POWERPC_SVR_8323 = xxx,
|
|
#endif
|
|
#if 0
|
|
POWERPC_SVR_8323E = xxx,
|
|
#endif
|
|
POWERPC_SVR_8343 = 0x80570010,
|
|
POWERPC_SVR_8343A = 0x80570030,
|
|
POWERPC_SVR_8343E = 0x80560010,
|
|
POWERPC_SVR_8343EA = 0x80560030,
|
|
POWERPC_SVR_8347P = 0x80550010, /* PBGA package */
|
|
POWERPC_SVR_8347T = 0x80530010, /* TBGA package */
|
|
POWERPC_SVR_8347AP = 0x80550030, /* PBGA package */
|
|
POWERPC_SVR_8347AT = 0x80530030, /* TBGA package */
|
|
POWERPC_SVR_8347EP = 0x80540010, /* PBGA package */
|
|
POWERPC_SVR_8347ET = 0x80520010, /* TBGA package */
|
|
POWERPC_SVR_8347EAP = 0x80540030, /* PBGA package */
|
|
POWERPC_SVR_8347EAT = 0x80520030, /* TBGA package */
|
|
POWERPC_SVR_8349 = 0x80510010,
|
|
POWERPC_SVR_8349A = 0x80510030,
|
|
POWERPC_SVR_8349E = 0x80500010,
|
|
POWERPC_SVR_8349EA = 0x80500030,
|
|
#if 0
|
|
POWERPC_SVR_8358E = xxx,
|
|
#endif
|
|
#if 0
|
|
POWERPC_SVR_8360E = xxx,
|
|
#endif
|
|
#define POWERPC_SVR_E500 0x40000000
|
|
POWERPC_SVR_8377 = 0x80C70010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8377E = 0x80C60010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8378 = 0x80C50010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8378E = 0x80C40010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8379 = 0x80C30010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8379E = 0x80C00010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8533_v10 = 0x80340010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8533_v11 = 0x80340011 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8533E_v10 = 0x803C0010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8533E_v11 = 0x803C0011 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8540_v10 = 0x80300010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8540_v20 = 0x80300020 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8540_v21 = 0x80300021 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8541_v10 = 0x80720010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8541_v11 = 0x80720011 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8541E_v10 = 0x807A0010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8541E_v11 = 0x807A0011 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8543_v10 = 0x80320010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8543_v11 = 0x80320011 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8543_v20 = 0x80320020 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8543_v21 = 0x80320021 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8543E_v10 = 0x803A0010 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8543E_v11 = 0x803A0011 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8543E_v20 = 0x803A0020 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8543E_v21 = 0x803A0021 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8544_v10 = 0x80340110 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8544_v11 = 0x80340111 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8544E_v10 = 0x803C0110 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8544E_v11 = 0x803C0111 | POWERPC_SVR_E500,
|
|
POWERPC_SVR_8545_v20 = 0x80310220 | POWERPC_SVR_E500,
|
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POWERPC_SVR_8545_v21 = 0x80310221 | POWERPC_SVR_E500,
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POWERPC_SVR_8545E_v20 = 0x80390220 | POWERPC_SVR_E500,
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POWERPC_SVR_8545E_v21 = 0x80390221 | POWERPC_SVR_E500,
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POWERPC_SVR_8547E_v20 = 0x80390120 | POWERPC_SVR_E500,
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POWERPC_SVR_8547E_v21 = 0x80390121 | POWERPC_SVR_E500,
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POWERPC_SVR_8548_v10 = 0x80310010 | POWERPC_SVR_E500,
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POWERPC_SVR_8548_v11 = 0x80310011 | POWERPC_SVR_E500,
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POWERPC_SVR_8548_v20 = 0x80310020 | POWERPC_SVR_E500,
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POWERPC_SVR_8548_v21 = 0x80310021 | POWERPC_SVR_E500,
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POWERPC_SVR_8548E_v10 = 0x80390010 | POWERPC_SVR_E500,
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POWERPC_SVR_8548E_v11 = 0x80390011 | POWERPC_SVR_E500,
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POWERPC_SVR_8548E_v20 = 0x80390020 | POWERPC_SVR_E500,
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POWERPC_SVR_8548E_v21 = 0x80390021 | POWERPC_SVR_E500,
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POWERPC_SVR_8555_v10 = 0x80710010 | POWERPC_SVR_E500,
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POWERPC_SVR_8555_v11 = 0x80710011 | POWERPC_SVR_E500,
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POWERPC_SVR_8555E_v10 = 0x80790010 | POWERPC_SVR_E500,
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POWERPC_SVR_8555E_v11 = 0x80790011 | POWERPC_SVR_E500,
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POWERPC_SVR_8560_v10 = 0x80700010 | POWERPC_SVR_E500,
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POWERPC_SVR_8560_v20 = 0x80700020 | POWERPC_SVR_E500,
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POWERPC_SVR_8560_v21 = 0x80700021 | POWERPC_SVR_E500,
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POWERPC_SVR_8567 = 0x80750111 | POWERPC_SVR_E500,
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POWERPC_SVR_8567E = 0x807D0111 | POWERPC_SVR_E500,
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POWERPC_SVR_8568 = 0x80750011 | POWERPC_SVR_E500,
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POWERPC_SVR_8568E = 0x807D0011 | POWERPC_SVR_E500,
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POWERPC_SVR_8572 = 0x80E00010 | POWERPC_SVR_E500,
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POWERPC_SVR_8572E = 0x80E80010 | POWERPC_SVR_E500,
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POWERPC_SVR_8610 = 0x80A00011,
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POWERPC_SVR_8641 = 0x80900021,
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POWERPC_SVR_8641D = 0x80900121,
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};
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#endif
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