Peter Maydell 200bf596b9 target-arm: Fix 11MPCore cache type register value ... Make the 11MPCore report a valid value in its cache type register (the previous value appears to have been incorrectly copied from the 1136/1176). In particular, do not report that we have an aliasing VIPT cache, because this causes Linux to attempt to use the v6 block cache ops which the 11MPCore doesn't actually have. (This causes no problems currently because we over-broadly provide those ops on all cores, but prevents us correctly narrowing the block ops down to those cores which actually implement them.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2012-06-20 12:00:58 +00:00
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arm-semi.c	build: move obj-TARGET-y variables to nested Makefile.objs	2012-06-07 07:17:36 +02:00
cpu-qom.h	target-arm: Move A9 config_base_address reset value to ARMCPU	2012-04-27 11:06:18 +00:00
cpu.c	target-arm: Fix 11MPCore cache type register value	2012-06-20 12:00:58 +00:00
cpu.h	target-arm/cpu.h: Make cpu_init("nonexistent cpu") return NULL	2012-05-10 12:56:09 +00:00
helper.c	Kill off cpu_state_reset()	2012-06-04 23:00:45 +02:00
helper.h	target-arm: Implement VFPv4 fused multiply-accumulate insns	2011-10-19 16:14:07 +00:00
iwmmxt_helper.c	target-arm: Don't overuse CPUState	2012-03-14 22:20:24 +01:00
machine.c	arm: Add dummy support for co-processor 15's secure config register	2012-01-13 17:25:08 +00:00
Makefile.objs	build: move other target-*/ objects to nested Makefile.objs	2012-06-07 09:21:11 +02:00
neon_helper.c	target-arm: When setting FPSCR.QC, don't clear other FPSCR bits	2012-05-10 12:56:08 +00:00
op_addsub.h	Correct spelling of licensed	2011-07-23 11:26:12 -05:00
op_helper.c	Use uintptr_t for various op related functions	2012-04-14 14:23:37 +00:00
translate.c	target-arm: Make SETEND respect bswap_code (BE8) setting	2012-04-27 11:07:52 +00:00