haraldwolff/qemu-patch-raspberry4
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qemu-patch-raspberry4/target/ppc/translate
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Richard Henderson 571fbe6ccd target/ppc: Use vector variable shifts for VSL, VSR, VSRA 
The gvec expanders take care of masking the shift amount
against the element width.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20190518191430.21686-2-richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-05-29 11:39:45 +10:00
..
dfp-impl.inc.c target/ppc: move FP and VMX registers into aligned vsr register array 2019-01-09 09:28:14 +11:00
dfp-ops.inc.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
fp-impl.inc.c target/ppc: Style fixes for translate/fp-impl.inc.c 2019-04-26 11:37:57 +10:00
fp-ops.inc.c target/ppc: add external PID support 2018-11-08 12:04:40 +11:00
spe-impl.inc.c target/ppc: Use tcg_gen_abs_i32 2019-05-13 22:52:08 +00:00
spe-ops.inc.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
vmx-impl.inc.c target/ppc: Use vector variable shifts for VSL, VSR, VSRA 2019-05-29 11:39:45 +10:00
vmx-ops.inc.c Changes requirement for "vsubsbs" instruction 2018-12-21 09:29:12 +11:00
vsx-impl.inc.c target/ppc: Fix xvabs[sd]p, xvnabs[sd]p, xvneg[sd]p, xvcpsgn[sd]p 2019-05-29 11:39:45 +10:00
vsx-ops.inc.c target-ppc: Add xscvqpudz and xscvqpuwz instructions 2017-02-22 11:28:28 +11:00