qemu-patch-raspberry4/target-mips
Kwok Cheung Yeung 1239b472bb linux-user: Save the correct resume address for MIPS signal handling
The current ISA mode needs to be saved in bit 0 of the resume address.
If the current instruction happens to be in a branch delay slot, then
the address of the preceding jump instruction should be stored instead.
exception_resume_pc already does both of these tasks, so it is
made available and reused.

MIPS_HFLAG_BMASK in hflags is cleared, otherwise QEMU may treat the
first instruction of the signal handler as a delay slot instruction.

Signed-off-by: Kwok Cheung Yeung <kcy@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-05-20 18:16:17 +02:00
..
cpu-qom.h
cpu.c
cpu.h linux-user: Save the correct resume address for MIPS signal handling 2013-05-20 18:16:17 +02:00
dsp_helper.c
helper.c linux-user: Save the correct resume address for MIPS signal handling 2013-05-20 18:16:17 +02:00
helper.h
lmi_helper.c
machine.c
Makefile.objs
mips-defs.h
op_helper.c
TODO
translate.c
translate_init.c