We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part] Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part] Acked-by: Michael Walle <michael@walle.cc> [lm32 part] Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part] Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part] Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part] Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part] Acked-by: Richard Henderson <rth@twiddle.net> [alpha part] Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part] Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part] Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [crisµblaze part] Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part] Signed-off-by: Thomas Huth <thuth@redhat.com>
169 lines
4.4 KiB
C
169 lines
4.4 KiB
C
/*
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* x86 MPX helpers
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*
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* Copyright (c) 2015 Red Hat, Inc.
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/helper-proto.h"
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#include "exec/cpu_ldst.h"
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#include "exec/exec-all.h"
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void cpu_sync_bndcs_hflags(CPUX86State *env)
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{
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uint32_t hflags = env->hflags;
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uint32_t hflags2 = env->hflags2;
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uint32_t bndcsr;
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if ((hflags & HF_CPL_MASK) == 3) {
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bndcsr = env->bndcs_regs.cfgu;
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} else {
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bndcsr = env->msr_bndcfgs;
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}
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if ((env->cr[4] & CR4_OSXSAVE_MASK)
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&& (env->xcr0 & XSTATE_BNDCSR_MASK)
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&& (bndcsr & BNDCFG_ENABLE)) {
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hflags |= HF_MPX_EN_MASK;
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} else {
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hflags &= ~HF_MPX_EN_MASK;
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}
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if (bndcsr & BNDCFG_BNDPRESERVE) {
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hflags2 |= HF2_MPX_PR_MASK;
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} else {
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hflags2 &= ~HF2_MPX_PR_MASK;
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}
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env->hflags = hflags;
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env->hflags2 = hflags2;
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}
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void helper_bndck(CPUX86State *env, uint32_t fail)
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{
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if (unlikely(fail)) {
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env->bndcs_regs.sts = 1;
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raise_exception_ra(env, EXCP05_BOUND, GETPC());
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}
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}
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static uint64_t lookup_bte64(CPUX86State *env, uint64_t base, uintptr_t ra)
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{
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uint64_t bndcsr, bde, bt;
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if ((env->hflags & HF_CPL_MASK) == 3) {
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bndcsr = env->bndcs_regs.cfgu;
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} else {
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bndcsr = env->msr_bndcfgs;
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}
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bde = (extract64(base, 20, 28) << 3) + (extract64(bndcsr, 20, 44) << 12);
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bt = cpu_ldq_data_ra(env, bde, ra);
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if ((bt & 1) == 0) {
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env->bndcs_regs.sts = bde | 2;
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raise_exception_ra(env, EXCP05_BOUND, ra);
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}
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return (extract64(base, 3, 17) << 5) + (bt & ~7);
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}
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static uint32_t lookup_bte32(CPUX86State *env, uint32_t base, uintptr_t ra)
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{
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uint32_t bndcsr, bde, bt;
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if ((env->hflags & HF_CPL_MASK) == 3) {
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bndcsr = env->bndcs_regs.cfgu;
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} else {
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bndcsr = env->msr_bndcfgs;
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}
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bde = (extract32(base, 12, 20) << 2) + (bndcsr & TARGET_PAGE_MASK);
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bt = cpu_ldl_data_ra(env, bde, ra);
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if ((bt & 1) == 0) {
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env->bndcs_regs.sts = bde | 2;
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raise_exception_ra(env, EXCP05_BOUND, ra);
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}
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return (extract32(base, 2, 10) << 4) + (bt & ~3);
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}
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uint64_t helper_bndldx64(CPUX86State *env, target_ulong base, target_ulong ptr)
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{
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uintptr_t ra = GETPC();
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uint64_t bte, lb, ub, pt;
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bte = lookup_bte64(env, base, ra);
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lb = cpu_ldq_data_ra(env, bte, ra);
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ub = cpu_ldq_data_ra(env, bte + 8, ra);
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pt = cpu_ldq_data_ra(env, bte + 16, ra);
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if (pt != ptr) {
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lb = ub = 0;
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}
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env->mmx_t0.MMX_Q(0) = ub;
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return lb;
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}
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uint64_t helper_bndldx32(CPUX86State *env, target_ulong base, target_ulong ptr)
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{
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uintptr_t ra = GETPC();
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uint32_t bte, lb, ub, pt;
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bte = lookup_bte32(env, base, ra);
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lb = cpu_ldl_data_ra(env, bte, ra);
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ub = cpu_ldl_data_ra(env, bte + 4, ra);
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pt = cpu_ldl_data_ra(env, bte + 8, ra);
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if (pt != ptr) {
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lb = ub = 0;
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}
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return ((uint64_t)ub << 32) | lb;
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}
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void helper_bndstx64(CPUX86State *env, target_ulong base, target_ulong ptr,
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uint64_t lb, uint64_t ub)
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{
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uintptr_t ra = GETPC();
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uint64_t bte;
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bte = lookup_bte64(env, base, ra);
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cpu_stq_data_ra(env, bte, lb, ra);
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cpu_stq_data_ra(env, bte + 8, ub, ra);
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cpu_stq_data_ra(env, bte + 16, ptr, ra);
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}
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void helper_bndstx32(CPUX86State *env, target_ulong base, target_ulong ptr,
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uint64_t lb, uint64_t ub)
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{
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uintptr_t ra = GETPC();
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uint32_t bte;
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bte = lookup_bte32(env, base, ra);
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cpu_stl_data_ra(env, bte, lb, ra);
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cpu_stl_data_ra(env, bte + 4, ub, ra);
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cpu_stl_data_ra(env, bte + 8, ptr, ra);
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}
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void helper_bnd_jmp(CPUX86State *env)
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{
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if (!(env->hflags2 & HF2_MPX_PR_MASK)) {
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memset(env->bnd_regs, 0, sizeof(env->bnd_regs));
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env->hflags &= ~HF_MPX_IU_MASK;
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}
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}
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