The point of writing a macro embedded in a 'do { ... } while (0)' loop (particularly if the macro has multiple statements or would otherwise end with an 'if' statement) is so that the macro can be used as a drop-in statement with the caller supplying the trailing ';'. Although our coding style frowns on brace-less 'if': if (cond) statement; else something else; that is the classic case where failure to use do/while(0) wrapping would cause the 'else' to pair with any embedded 'if' in the macro rather than the intended outer 'if'. But conversely, if the macro includes an embedded ';', then the same brace-less coding style would now have two statements, making the 'else' a syntax error rather than pairing with the outer 'if'. Thus, even though our coding style with required braces is not impacted, ending a macro with ';' makes our code harder to port to projects that use brace-less styles. The change should have no semantic impact. I was not able to fully compile-test all of the changes (as some of them are examples of the ugly bit-rotting debug print statements that are completely elided by default, and I didn't want to recompile with the necessary -D witnesses - cleaning those up is left as a bite-sized task for another day); I did, however, audit that for all files touched, all callers of the changed macros DID supply a trailing ';' at the callsite, and did not appear to be used as part of a brace-less conditional. Found mechanically via: $ git grep -B1 'while (0);' | grep -A1 \\\\ Signed-off-by: Eric Blake <eblake@redhat.com> Acked-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20171201232433.25193-7-eblake@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
163 lines
4.9 KiB
C
163 lines
4.9 KiB
C
/*
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* STM32F2XX SYSCFG
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*
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* Copyright (c) 2014 Alistair Francis <alistair@alistair23.me>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "hw/misc/stm32f2xx_syscfg.h"
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#include "qemu/log.h"
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#ifndef STM_SYSCFG_ERR_DEBUG
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#define STM_SYSCFG_ERR_DEBUG 0
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#endif
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#define DB_PRINT_L(lvl, fmt, args...) do { \
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if (STM_SYSCFG_ERR_DEBUG >= lvl) { \
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qemu_log("%s: " fmt, __func__, ## args); \
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} \
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} while (0)
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#define DB_PRINT(fmt, args...) DB_PRINT_L(1, fmt, ## args)
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static void stm32f2xx_syscfg_reset(DeviceState *dev)
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{
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STM32F2XXSyscfgState *s = STM32F2XX_SYSCFG(dev);
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s->syscfg_memrmp = 0x00000000;
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s->syscfg_pmc = 0x00000000;
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s->syscfg_exticr1 = 0x00000000;
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s->syscfg_exticr2 = 0x00000000;
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s->syscfg_exticr3 = 0x00000000;
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s->syscfg_exticr4 = 0x00000000;
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s->syscfg_cmpcr = 0x00000000;
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}
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static uint64_t stm32f2xx_syscfg_read(void *opaque, hwaddr addr,
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unsigned int size)
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{
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STM32F2XXSyscfgState *s = opaque;
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DB_PRINT("0x%"HWADDR_PRIx"\n", addr);
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switch (addr) {
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case SYSCFG_MEMRMP:
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return s->syscfg_memrmp;
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case SYSCFG_PMC:
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return s->syscfg_pmc;
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case SYSCFG_EXTICR1:
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return s->syscfg_exticr1;
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case SYSCFG_EXTICR2:
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return s->syscfg_exticr2;
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case SYSCFG_EXTICR3:
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return s->syscfg_exticr3;
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case SYSCFG_EXTICR4:
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return s->syscfg_exticr4;
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case SYSCFG_CMPCR:
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return s->syscfg_cmpcr;
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default:
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qemu_log_mask(LOG_GUEST_ERROR,
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"%s: Bad offset 0x%"HWADDR_PRIx"\n", __func__, addr);
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return 0;
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}
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return 0;
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}
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static void stm32f2xx_syscfg_write(void *opaque, hwaddr addr,
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uint64_t val64, unsigned int size)
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{
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STM32F2XXSyscfgState *s = opaque;
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uint32_t value = val64;
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DB_PRINT("0x%x, 0x%"HWADDR_PRIx"\n", value, addr);
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switch (addr) {
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case SYSCFG_MEMRMP:
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qemu_log_mask(LOG_UNIMP,
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"%s: Changeing the memory mapping isn't supported " \
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"in QEMU\n", __func__);
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return;
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case SYSCFG_PMC:
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qemu_log_mask(LOG_UNIMP,
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"%s: Changeing the memory mapping isn't supported " \
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"in QEMU\n", __func__);
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return;
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case SYSCFG_EXTICR1:
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s->syscfg_exticr1 = (value & 0xFFFF);
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return;
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case SYSCFG_EXTICR2:
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s->syscfg_exticr2 = (value & 0xFFFF);
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return;
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case SYSCFG_EXTICR3:
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s->syscfg_exticr3 = (value & 0xFFFF);
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return;
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case SYSCFG_EXTICR4:
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s->syscfg_exticr4 = (value & 0xFFFF);
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return;
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case SYSCFG_CMPCR:
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s->syscfg_cmpcr = value;
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return;
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default:
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qemu_log_mask(LOG_GUEST_ERROR,
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"%s: Bad offset 0x%"HWADDR_PRIx"\n", __func__, addr);
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}
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}
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static const MemoryRegionOps stm32f2xx_syscfg_ops = {
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.read = stm32f2xx_syscfg_read,
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.write = stm32f2xx_syscfg_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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static void stm32f2xx_syscfg_init(Object *obj)
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{
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STM32F2XXSyscfgState *s = STM32F2XX_SYSCFG(obj);
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sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq);
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memory_region_init_io(&s->mmio, obj, &stm32f2xx_syscfg_ops, s,
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TYPE_STM32F2XX_SYSCFG, 0x400);
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sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio);
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}
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static void stm32f2xx_syscfg_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->reset = stm32f2xx_syscfg_reset;
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}
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static const TypeInfo stm32f2xx_syscfg_info = {
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.name = TYPE_STM32F2XX_SYSCFG,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(STM32F2XXSyscfgState),
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.instance_init = stm32f2xx_syscfg_init,
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.class_init = stm32f2xx_syscfg_class_init,
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};
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static void stm32f2xx_syscfg_register_types(void)
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{
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type_register_static(&stm32f2xx_syscfg_info);
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}
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type_init(stm32f2xx_syscfg_register_types)
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