f317c0ee57
Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210708170550.1846343-7-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
46 lines
1 KiB
C
46 lines
1 KiB
C
#ifndef MIPS_TARGET_SYSCALL_H
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#define MIPS_TARGET_SYSCALL_H
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/* this struct defines the way the registers are stored on the
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stack during a system call. */
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struct target_pt_regs {
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/* Pad bytes for argument save space on the stack. */
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abi_ulong pad0[6];
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/* Saved main processor registers. */
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abi_ulong regs[32];
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/* Saved special registers. */
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abi_ulong cp0_status;
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abi_ulong lo;
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abi_ulong hi;
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abi_ulong cp0_badvaddr;
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abi_ulong cp0_cause;
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abi_ulong cp0_epc;
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};
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#define UNAME_MACHINE "mips"
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#define UNAME_MINIMUM_RELEASE "2.6.32"
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#define TARGET_CLONE_BACKWARDS
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#define TARGET_MINSIGSTKSZ 2048
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#define TARGET_MCL_CURRENT 1
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#define TARGET_MCL_FUTURE 2
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#define TARGET_MCL_ONFAULT 4
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#define TARGET_FORCE_SHMLBA
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static inline abi_ulong target_shmlba(CPUMIPSState *env)
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{
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return 0x40000;
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}
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/* MIPS-specific prctl() options */
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#define TARGET_PR_SET_FP_MODE 45
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#define TARGET_PR_GET_FP_MODE 46
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#define TARGET_PR_FP_MODE_FR (1 << 0)
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#define TARGET_PR_FP_MODE_FRE (1 << 1)
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#endif /* MIPS_TARGET_SYSCALL_H */
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