d46b40fce2
This patch adds edid support to the qemu stdvga. It is turned off by default and can be enabled with the new edid property. The patch also adds xres and yres properties to specify the video mode you want the guest use. Works only with edid enabled and updated guest driver. The mmio bar of the stdvga has some unused address space at the start. It was reserved just in case it'll be needed for virtio, but it turned out to not be needed for that. So let's use that region to place the EDID data block there. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20180925075646.25114-6-kraxel@redhat.com
82 lines
2.3 KiB
Plaintext
82 lines
2.3 KiB
Plaintext
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QEMU Standard VGA
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=================
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Exists in two variants, for isa and pci.
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command line switches:
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-vga std [ picks isa for -M isapc, otherwise pci ]
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-device VGA [ pci variant ]
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-device isa-vga [ isa variant ]
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-device secondary-vga [ legacy-free pci variant ]
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PCI spec
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--------
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Applies to the pci variant only for obvious reasons.
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PCI ID: 1234:1111
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PCI Region 0:
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Framebuffer memory, 16 MB in size (by default).
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Size is tunable via vga_mem_mb property.
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PCI Region 1:
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Reserved (so we have the option to make the framebuffer bar 64bit).
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PCI Region 2:
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MMIO bar, 4096 bytes in size (qemu 1.3+)
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PCI ROM Region:
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Holds the vgabios (qemu 0.14+).
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The legacy-free variant has no ROM and has PCI_CLASS_DISPLAY_OTHER
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instead of PCI_CLASS_DISPLAY_VGA.
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IO ports used
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-------------
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Doesn't apply to the legacy-free pci variant, use the MMIO bar instead.
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03c0 - 03df : standard vga ports
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01ce : bochs vbe interface index port
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01cf : bochs vbe interface data port (x86 only)
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01d0 : bochs vbe interface data port
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Memory regions used
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-------------------
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0xe0000000 : Framebuffer memory, isa variant only.
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The pci variant used to mirror the framebuffer bar here, qemu 0.14+
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stops doing that (except when in -M pc-$old compat mode).
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MMIO area spec
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--------------
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Likewise applies to the pci variant only for obvious reasons.
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0000 - 03ff : edid data blob.
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0400 - 041f : vga ioports (0x3c0 -> 0x3df), remapped 1:1.
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word access is supported, bytes are written
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in little endia order (aka index port first),
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so indexed registers can be updated with a
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single mmio write (and thus only one vmexit).
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0500 - 0515 : bochs dispi interface registers, mapped flat
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without index/data ports. Use (index << 1)
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as offset for (16bit) register access.
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0600 - 0607 : qemu extended registers. qemu 2.2+ only.
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The pci revision is 2 (or greater) when
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these registers are present. The registers
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are 32bit.
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0600 : qemu extended register region size, in bytes.
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0604 : framebuffer endianness register.
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- 0xbebebebe indicates big endian.
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- 0x1e1e1e1e indicates little endian.
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