324b2298fe
Apart from targets.rst, which was written by hand, this is an automated
conversion obtained with the following command:
makeinfo --force -o - --docbook \
-D 'qemu_system_x86 QEMU_SYSTEM_X86_MACRO' \
-D 'qemu_system QEMU_SYSTEM_MACRO' \
$texi | pandoc -f docbook -t rst+smart | perl -e '
$/=undef;
$_ = <>;
s/^- − /- /gm;
s/QEMU_SYSTEM_MACRO/|qemu_system|/g;
s/QEMU_SYSTEM_X86_MACRO/|qemu_system_x86|/g;
s/(?=::\n\n +\|qemu)/.. parsed-literal/g;
s/:\n\n::$/::/gm;
print' > $rst
In addition, the following changes were made manually:
- target-i386.rst and target-mips.rst: replace CPU model documentation with
an include directive
- monitor.rst: replace the command section with a comment
- images.rst: add toctree
- target-arm.rst: Replace use of :math: (which Sphinx complains
about) with :sup:, and hide it behind |I2C| and |I2C| substitutions.
Content that is not @included remains exclusive to qemu-doc.texi.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200228153619.9906-20-peter.maydell@linaro.org
Message-id: 20200226113034.6741-19-pbonzini@redhat.com
[PMM: Fixed target-arm.rst use of :math:; remove out of date
note about images.rst from commit message; fixed expansion
of |qemu_system_x86|; use parsed-literal in invocation.rst
when we want to use |qemu_system_x86|; fix incorrect subsection
level for "OS requirements" in target-i386.rst; fix incorrect
syntax for making links to other sections of the manual]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
40 lines
1.1 KiB
ReStructuredText
40 lines
1.1 KiB
ReStructuredText
.. _Xtensa-System-emulator:
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Xtensa System emulator
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----------------------
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Two executables cover simulation of both Xtensa endian options,
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``qemu-system-xtensa`` and ``qemu-system-xtensaeb``. Two different
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machine types are emulated:
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- Xtensa emulator pseudo board \"sim\"
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- Avnet LX60/LX110/LX200 board
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The sim pseudo board emulation provides an environment similar to one
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provided by the proprietary Tensilica ISS. It supports:
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- A range of Xtensa CPUs, default is the DC232B
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- Console and filesystem access via semihosting calls
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The Avnet LX60/LX110/LX200 emulation supports:
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- A range of Xtensa CPUs, default is the DC232B
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- 16550 UART
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- OpenCores 10/100 Mbps Ethernet MAC
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The following options are specific to the Xtensa emulation:
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``-semihosting``
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Enable semihosting syscall emulation.
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Xtensa semihosting provides basic file IO calls, such as
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open/read/write/seek/select. Tensilica baremetal libc for ISS and
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linux platform \"sim\" use this interface.
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Note that this allows guest direct access to the host filesystem, so
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should only be used with trusted guest OS.
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